em78p210n ELAN Microelectronics Corp, em78p210n Datasheet
em78p210n
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em78p210n Summary of contents
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... EM78P210N 8-Bit Microcontroller with OTP ROM Specification Product D ELAN MICROELECTRONICS CORP 1.2 OC ERSION April 2008 ...
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... Trademark Acknowledgments: IBM is a registered trademark and PS trademark of IBM. Windows is a trademark of Microsoft Corporation. ELAN and ELAN logo © 2007~2008 by ELAN Microelectronics Corporation Copyright All Rights Reserved Printed in Taiwan The contents of this specification are subject to change without further notice. ELAN Microelectronics assumes no responsibility concerning the accuracy, adequacy, or completeness of this specification ...
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... Contents 1 General Description .................................................................................................. 1 2 Features ..................................................................................................................... 1 3 Pin Assignment ......................................................................................................... 2 4 Pin Description.......................................................................................................... 3 4.1 EM78P210ND20/SO20/SS20 ............................................................................ 3 4.2 EM78P210NK24/SO24/SS24A .......................................................................... 4 5 Block Diagram ........................................................................................................... 5 6 Function Description ................................................................................................ 6 6.1 Register Configuration........................................................................................ 6 6.2 Registers Description ......................................................................................... 7 6.2.1 A (Accumulator)...................................................................................................7 6.2.2 CONT (Control Register).....................................................................................7 6.2.3 R0 (Indirect Addressing Register) ......................................................................8 6.2.4 R1 (Memory Switch Register) .............................................................................8 6.2.5 R2 (Program Counter) and Stack........................................................................8 6 ...
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Contents 6.2.31 Bank 3-R7 (Noise and LVR Control) - only for ICE ...........................................20 6.2.32 Bank 3-R8~RF (Reserve)..................................................................................20 6.2.33 R10 ~ R1F .........................................................................................................20 6.2.34 Banks 0~3 - R20 ~ R3F ....................................................................................20 6.3 TCC/WDT and Prescaler.................................................................................. 21 6.4 I/O Ports ........................................................................................................... 22 ...
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... A Package Type........................................................................................................... 58 B Packaging Configurations...................................................................................... 59 B.1 EM78P210ND20 .............................................................................................. 59 B.2 EM78P210NSO20............................................................................................ 60 B.3 EM78P210NSS20 ............................................................................................ 61 B.4 EM78P210NK24............................................................................................... 62 B.5 EM78P210NSO24............................................................................................ 63 B.6 EM78P210NSS24A.......................................................................................... 64 C Quality Assurance and Reliability ........................................................................ 65 C.1 Address Trap Detect......................................................................................... 65 D How to Use the ICE210N......................................................................................... 66 E Comparison between V-Package and U-Package Version .................................. 69 Product Specification (V1.2) 03.25.2008 APPENDIX Contents • v ...
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... Initial released version Renamed the Product as EM78P210N from EM78P211N, 1.1 EM78P212N * 1. Retrieved ICE220N, Updated with ICE210N. 1 For ICE210N and EM78P210N, added Green mode and Idle mode. *ICE210N vs ICE220N Comparison Table Item P72, P73 Function (when used as output pins) P81 Function (when used as output pins) ...
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... General Description The EM78P210N is an 8-bit microprocessor designed and developed with low-power and high-speed CMOS technology. The device has as an on-chip 2K×13-bit Electrical One Time Programmable Read Only Memory (OTP-ROM). It provides a protection bit to prevent intrusion of user’s OTP memory code. Two Code option bits are also available to meet user’s requirements. With its enhanced OTP-ROM features, the device provides a convenient way of developing and verifying user’ ...
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... P64 Figure 3-1 EM78P210ND20/SO20/SS20 2 • P81//RESET 20 19 P53/OSCI 18 P52/OSCO P70 17 P71/CO/INT1 16 P72/CIN P73/CIN- 13 P67 12 P66 P65 11 Figure 3-2 EM78P210NK24/SO24/SS24A (This specification is subject to change without further notice) 1 P81//RESET P55 24 2 P56/TCC 23 P53/OSCI 3 VDD 22 P52/OSCO 4 VSS 21 P70 5 P71/CO/INT1 P77/INT0 ...
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... Pin Description 4.1 EM78P210ND20/SO20/SS20 Symbol Pin No. P52~P53 P55~P56 P60~P67 P70~P73 P77 P81 CIN- CIN+ CO OSCI OSCO /RESET INT0~INT1 VDD VSS Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) Type 4-bit General purpose input/output pins. Pull-high (P52~P53) / Open-drain function. 18~19 I/O 1~2 High sink function. ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 4.2 EM78P210NK24/SO24/SS24A Symbol Pin No. P50~P57 P60~P67 15 ~17 P70~P73 P77 P81 CIN- CIN+ CO OSCI OSCO /RESET INT0~INT1 VDD VSS 4 • Type 8-bit General purpose input/output pins. 11~14 Pull-high (P50~P53) / Open-drain function. 22~23 I/O High sink Function. 1~2 Default value at power-on reset. ...
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... P62 P63 P64 P65 P66 ACC P67 P5 P50 P51 P52 P53 P54 P55 P56 P57 Figure 5 EM78P210N Functional Block Diagram Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) Ext. PC OSC. Oscillation 8-level stack Generation (13 bit) Mux . R4 RAM Interrupt R3 (Status Control Reg ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6 Function Description 6.1 Register Configuration Addr Bank 0 Registers 00 R0 (Indirect Addressing Register (Memory switch register (Program Counter (Status Register (Select Indirect Address (Port (Port (Port (Port 8) 09 Reserve ...
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... TCC rate is 1 prescaler enable bit. TCC rate is set as Bit 2 ~ Bit 0. PST1 PST0 EM78P210N 8-Bit Microcontroller with OTP ROM Bit 3 Bit 2 Bit 1 PSTE PST2 PST1 TCC Rate 1:2 1:4 1:8 1:16 1:32 1:64 1:128 1:256 Bit 0 PST0 • 7 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.2.3 R0 (Indirect Addressing Register not a physically implemented register. Its major function is to perform as an indirect address pointer. Any instruction using pointer, actually accesses the data pointed by the RAM Select Register (R4). 6.2.4 R1 (Memory Switch Register) Bit 7 “ ...
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... NOTE Bit 4 and Bit 3 (T and P) are read only. Zero flag. Set to "1" if the result of an arithmetic or logic operation is zero. Auxiliary carry flag Carry flag EM78P210N 8-Bit Microcontroller with OTP ROM 11 ). Bit 3 Bit 2 Bit 1 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.2.7 R4 (Select Indirect Address) Bits 7~6: not used, fixed to 0 all the time. Bit used to select registers (Address 3F) in indirect addressing mode. 6.2.8 Bank 0-R5 (Port 5) Bit 7 P57 Bits (P57 ~ P50): I/O data bits 6.2.9 Bank 0-R6 (Port 6) Bit 7 P67 Bits (P67 ~ P60): I/O data bits 6 ...
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... Disable Port 6 input change to wake-up status 1 = Enable Port 6 input change wake-up status When the Port 6 Input Status Change is used to enter interrupt vector or to wake-up EM78P210N from sleep, the ICWE bit must be set to “Enable“ Disable Comparator wake- Enable Comparator wake-up ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM Bit 1 (ICIF): Port 6 input status change interrupt flag. Set when Port 6 input changes. Reset by software interrupt occurs 1 = with interrupt request Bit 0 (TCIF): TCC overflow interrupt flag. Set when TCC overflows. Reset by software interrupt occurs 1 = with interrupt request ■ ...
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... Control bit used to enable the P63 pull-down pin Control bit used to enable the P62 pull-down pin Control bit used to enable the P61 pull-down pin Control bit used to enable the P60 pull-down pin EM78P210N 8-Bit Microcontroller with OTP ROM Function Description Bit 3 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.2.20 Bank 1-RC (Open-drain Control Register) Bit 7 /OD7 Bank 1-RC register is both readable and writable. Bit 7 (OD7): Bit 6 (OD6): Bit 5 (OD5): Bit 4 (OD4): Bit 3 (OD3): Bit 2 (OD2): Bit 1 (OD1): Bit 0 (OD0): 6.2.21 Bank 1-RD (Pull-high Control Register) Bit 7 /PH7 Bank 1-RD register is both readable and writable. ...
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... CMPIE bit must be set to “Enable“. But actually the comparator output must be read to latch the status first. Then the output of the comparator is compared to this latch to produce the information of output status change. EM78P210N 8-Bit Microcontroller with OTP ROM Bit 3 Bit 2 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.2.23 Bank 1-RF (Interrupt Mask Register) Bit register is both readable and writable Individual interrupt is enabled by setting its associated control bit in the RF to "1." Global interrupt is enabled by the ENI instruction and is disabled by the DISI instruction. Refer to Figure 6-8 (Interrupt Input Circuit) under Section 6.6 (Interrupt) ...
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... Output High Sink Current Select for P63 Output High Sink Current Select for P62 Output High Sink Current Select for P61 Output High Sink Current Select for P60 HDxx 0 1 EM78P210N 8-Bit Microcontroller with OTP ROM Bit 3 Bit 2 Bit 1 HS53 HS52 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.2.27 Bank 2-R8 (Operating Mode Control Register) Bit 7 0 TIMERSC Bit 7: Bit 6 (TIMERSC): TCC clock sources. Bit 5 (CPUS): CPU Oscillator Source Select Bit 4 (IDLE): Bits 3~0: 6.2.28 Bank 2-R9~RF (Reserve) not used, fixed to "0" all the time Bits 7~0: 18 • ...
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... Bit EM78P210N ICE210N Bits [With Simulator (C3~C0, RCM1~RCM0)]: IRC calibration bits in IRC oscillator mode. [With EM78P210N]: Bits (C3 ~ C0): Bits (RCM1 ~ RCM0): Bits are not used, fixed to "0" all the time. Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) ...
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... Bank 3-R7 (Noise and LVR Control) - only for ICE Bit EM78P210N ICE210N [With EM78P210N]: [With Simulator]: Bits not used, fixed to "0" all the time. Bits (TYPE1, TYPE0): Type selection for EM78P210N TYPE1, TYPE0 Bit 3 (NRHL): The noise rejection function is turned off in the LXT2 and in sleep mode. ...
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... The internal TCC will stop running when in sleep mode 8-bit Counter MUX MUX Prescaler TS (CONT) PST2~0 (CONT) 8-bit Counter MUX Prescaler PSW2~0 WDT Time out (Bank 1-RE) Figure 6-3 TCC and WDT Block Diagram EM78P210N Data Bus TCC (R1) TCC overflow Interrupt • 21 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.4 I/O Ports The I/O registers (Port 5, Port 6, Port 7, and Port 8) are bidirectional tri-state I/O ports. The Pull-high, Pull-down, and Open-drain functions can be set internally by Bank 1-RB, Bank 1-RC, and Bank 1-RD respectively. The High drive and High Sink functions can be set internally by Bank 2-R5, Bank 2-R6, and Bank 2-R7 respectively. Port 6 features an input status change interrupt (or wake-up) function. Most I/O pin can be defined as " ...
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... CLK CLK Figure 6-6 I/O Port and I/O Control Register Circuit for Port 6 EM78P210N 8-Bit Microcontroller with OTP ROM PCWR CLK IOD R CLK PDWR C L PDRD D PCW R IOD D PDW R PDRD TI n ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM ICIE CLK C L T10 T11 T17 /SLEP Figure 6-7 Port 6 Block Diagram with Input Change Interrupt/Wake-up 6.4.1 Usage of Port 6 Input Change Wake-up/Interrupt Function Usage of Port 6 Input Status Change Wake-up/Interrupt (1) Wake-up (a) Before Sleep 1. Disable WDT 2. Read I/O Port 6 (MOV R6,R6) 3. Execute " ...
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... Case 3 Port 6 input status changes (if ICWE is enabled) Case 4 Comparator output status changes (if CMPWE is enabled) 2 VDD=5V, Setup time period = 16.5ms ± 30%. VDD=3V, Setup time period = 18ms ± 30%. Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) EM78P210N 8-Bit Microcontroller with OTP ROM 2 after the • 25 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM The first two cases (1 and 2) will cause the EM78P210N to reset. The T and P flags of R3 can be used to determine the source of the reset (wake-up). Cases 3 & 4 are considered the continuation of program execution and the global interrupt ("ENI" or " ...
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... If Port 6 Input Status Change Interrupt is used to wake up the EM78P210N (as in Case b above), the following instructions must be executed before SLEP: MOV BANK MOV WDTC BANK MOV ENI (or DISI) MOV MOV MOV BANK MOV SLEP Similarly, if the Comparator Interrupt is used to wake up the EM78P210N (as in Case ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM The controller can be awakened from sleep and Idle mode. The wake-up signals are listed as follows: Signal Sleep Mode INT0 N/A INT1 Bank 0-RE (ICWE) Bit 4=0, Bank 1-RF (ICIE) Bit Oscillator and TCC are stopped. Port 6 input status changed wake-up is invalid ...
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... Interrupt Vector (0x08)+ (CMPIF) Bit Bank 0-RE (CMPIF) Oscillator and TCC are Bit stopped. Wake-up+ Reset Reset (Address 0x00) (Address 0x00) Wake-up+ Reset Reset (Address 0x00) (Address 0x00) EM78P210N Normal Mode Bank 1-RE (CMPIE) Bit Comparator output status change interrupt is invalid. N/A N/A N/A N/A N/A N/A ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.5.1.2 Register Initial Values after Reset The following table summarizes the registers initialized values. Reset Type Address Name Bit Name Power-on N/A CONT /RESET & WDT Wake-up from Pin Change Bit Name Power-on 0x00 R0 (IAR) /RESET & WDT ...
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... C67 C66 C65 C64 C77 - - - EM78P210N Bit 3 Bit 2 Bit 1 Bit 0 P73 P72 P71 P70 P81 - ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM Address Name Reset Type Bit Name Power-on 0x8 Bank 1-R8 /RESET & WDT Wake-up from Pin Change Bit Name Power-on Bank 1-R9 0x9 /RESET & WDT (Reserve) Wake-up from Pin Change Bit Name Power-on Bank 1-RA 0xA (CMPCON) /RESET & ...
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... P P TCC7 TCC6 TCC5 TCC4 EM78P210N Bit 3 Bit 2 Bit 1 Bit 0 - EXIE ICIE TCIE HD63 HD62 HD61 HD60 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM Address Name Reset Type Bit Name Bank 3-R7 Power-on 0x07 (only for /RESET & WDT ICE) Wake-up from Pin Change Bit Name Power-on 0x10 ~ R10 ~ R1F /RESET & WDT 0x1F Wake-up from Pin Change Bit Name ...
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... The following shows the events that may affect the status of T and P. Power-on WDTC instruction WDT time-out SLEP instruction Wake-up on pin changed during Sleep mode Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) 8-Bit Microcontroller with OTP ROM Reset Type Event EM78P210N ...
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... Before the Port 6 Input Status Change Interrupt is enabled, reading Port 6 (e.g., "MOV R6, R6") is necessary. Each Port 6 pin will have this feature if its status changes. Port 6 Input Status Change Interrupt will wake up the EM78P210N from sleep mode enabled prior to going into sleep mode by executing SLEP. When wake-up occurs, the controller will continue to execute the succeeding program if the global interrupt is disabled ...
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... Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) 8-Bit Microcontroller with OTP ROM BANK0-RE/RF RD BANK1-RE/RF WR BANK1-RE/RF BANK1-RE/RF RD BANK0-RE/RF WR Figure 6-9 Interrupt Input Circuit ACC ~0) R4 Figure 6-10 Interrupt Backup Diagram EM78P210N Interrupt Stack ACC occurs Stack R1 Stack R3 RETI Stack R4 • 37 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.7 Comparator The EM78P210N has one comparator comprising of two analog inputs and one output. The comparator can be utilized to wake up the EM78P210N from sleep mode. The comparator circuit diagram is depicted in the figure below. Cin - Cin+ Output 6.7.1 External Reference Signal The analog signal presented at Cin– ...
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... Disable Comparator wake- Enable Comparator wake-up When the Comparator output status change is used to enter an interrupt vector or to wake-up the EM78P210N from sleep, the CMPWE bit must be set to “Enable“. Comparator interrupt flag. Set when a change occurs in the Comparator output. Reset by software ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.7.3.2 Bank 1-RA (CMPCON: Comparator Control Register) Bit 7 EIS1 Bit 5 (CMPOUT): The result of the Comparator output Bit 4 ~ Bit 3 (CMPCOS1 ~ CMPCOS0): Comparator Select bits CMPCOS1 CMPCOS0 6.7.3.3 Bank 1-RE (WDT Control Register) Bit 7 WDTE Bit 0 (CMPIE): 6.7.4 Comparator Interrupt CMPIE must be enabled for the “ ...
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... The maximum operating frequency limit of the crystal/resonator at different VDDs, are as follows: Conditions Two clocks 6.8.2 Crystal Oscillator/Ceramic Resonators (Crystal) The EM78P210N can be driven by an external clock signal through the OSCO pin as illustrated below. Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) Oscillator Modes VDD 2 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM In most applications, Pin OSCI and Pin OSCO can be connected with a crystal or ceramic resonator to generate oscillation. Figure 6-17 below depicts such circuit. The same applies to the HXT 1, 2 modes and the LXT 1, 2 modes. The following table provides the recommended values for C1 and C2. Since each resonator has its own attribute, user should refer to the resonator specifications for appropriate values of C1 and C2 ...
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... Figure 6-15 Parallel Mode Crystal/Resonator Circuit Diagram Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) EM78P210N 8-Bit Microcontroller with OTP ROM • 43 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.8.3 External RC Oscillator Mode For some applications that do not require precise timing calculation, the RC oscillator (Figure 6-16) could offer a cost- effective oscillator configuration. Nevertheless, it should be noted that the frequency of the RC oscillator is influenced by the supply voltage, the values of the resistor (Rext), the capacitor (Cext), and even by the operation temperature ...
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... Internal RC Oscillator Mode The EM78P210N offers a versatile internal RC mode with default frequency value of 4MHz. Internal RC oscillator mode has other frequencies (1 MHz, 16 MHz, and 455kHz) that can be set by Code Option (Word 1), RCM1, and RCM0. The Table below describes the EM78P210N internal RC drift with the variations on voltage, temperature, and process. Internal RC Drift Rate (Ta=25 ° ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.9.2 Residual Voltage Protection When the battery is replaced, device power Vdd is removed but residual voltage remains. The residual voltage may trip below Vdd minimum, but not to zero. This condition may cause a poor power-on reset. Figure 6-16 and Figure 6-17 show how to create a protection circuit against residual voltage ...
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... Vdd reset level as Vdd changes, the system will be reset. VDD Reset Level NA (Power-on Reset) (default) 2.5V 3.0V 4.0V <LVR Voltage drop Vdd < Vreset not longer than 10us, the system still keeps on operating Figure 6-20 LVR Waveform Situation EM78P210N 8-Bit Microcontroller with OTP ROM Bit 4 Bit 3 Bit 2 Bit 1 - Protect VDD Release Level 2.7V 3.2V 4 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 6.11 Code Option EM78P210N has two Code Option Words and one Customer ID word that are not a part of the normal program memory. Word 0 Bit 12 ~ Bit 0 6.11.1 Code Option Register (Word 0) Bit Bit 12 Bit 11 Bit 10 Bit 9 Mne TYPE1 TYPE0 LVR1 LVR0 CLKS ENWDTB OSC2 OSC1 OSC0 ...
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... Word 1 Bit 10 Bit 9 Bit 8 Bit 7 RESETENB RCOUT NRHL NRE P81 System_clk 32/fc Enable /RESET Open_drain 8/fc Disable trigger Pulses equal to 8/fc is regarded as signal 1 = Pulses equal to 32/fc is regarded as signal (Default) EM78P210N 8-Bit Microcontroller with OTP ROM OSC2 OSC1 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM Bit 7 (NRE): Noise rejection enable The noise rejection function is turned off in LXT2 and sleep mode. Not used (Reserved). This bit is set to “1” all the time. Bit 6: C3, C2, C1, C0, RCM1 and RCM0 are at Bank 3-R6, when using ICE. ...
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... A → R 00rr MOV R,A 0 → A 0080 CLRA 0 → R 00rr CLR R R-A → A 01rr SUB A,R R-A → R 01rr SUB R,A R-1 → A 01rr DECA R R-1 → R 01rr DEC R EM78P210N Status Operation Affected None C None None None None None None None • 51 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM Binary Instruction 0 0010 00rr rrrr 0 0010 01rr rrrr 0 0010 10rr rrrr 0 0010 11rr rrrr 0 0011 00rr rrrr 0 0011 01rr rrrr 0 0011 10rr rrrr 0 0011 11rr rrrr 0 0100 00rr rrrr 0 0100 01rr rrrr 0 0100 10rr rrrr ...
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... LJMP k 1Fkk ADD A,k Items -40 ° C -65 ° C Vss-0.3V Vss-0.3V 2.3V DC EM78P210N 8-Bit Microcontroller with OTP ROM Operation k → ∨ k → & k → ⊕ k → → A, [Top of Stack] → PC k-A → → R1 (1:0) Next instruction: k kkkk kkkk kkkk; PC+1 → [SP], k → PC Next instruction: k kkkk kkkk kkkk ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 8 DC Electrical Characteristics Ta= 25 ° C, VDD= 5.0V, VSS= 0V Symbol Parameter Crystal: VDD to 5V FXT ERC: VDD to 5V Input High Threshold Voltage VIHRC (Schmitt Trigger) Input Low Threshold Voltage VILRC (Schmitt Trigger) Input Leakage Current IIL for input pins ...
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... C 5V 3.84 MHz 25 ° 15.36 MHz 25 ° 0.96 MHz 25 ° 436.8kHz Drift Rate Voltage 2.1V~5.5V 3.44 MHz 2.1V~5.5V 13.76 MHz 2.1V~5.5V 0.86 MHz 2.1V~5.5V 391.3kHz EM78P210N 8-Bit Microcontroller with OTP ROM Min. Typ. Max. Unit − − − 1.5 1.7 − 2.8 3.0 Min. Typ. 4 MHz 4.16 MHz 16 MHz 16.64 MHz 1 MHz 1 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 8.1 Comparator (OP) Characteristic Vdd = 5.0V, Vss=0V, Ta=25 ° C Symbol Parameter VOS Input offset voltage Input common-mode Vcm voltages range IOS Input offset current IBS Input bias current ICO Comparator Supply current TRS Response time TLRS Large signal response time VRL = 5V 5.1k ...
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... RESET Timing (CLK="0") CLK /RESET TCC Input Timing (CLKS="0") Tins CLK TCC Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) 8-Bit Microcontroller with OTP ROM 0.75VDD 0.75VDD TEST POINTS 0.25VDD 0.25VDD NOP Tdrh Ttcc EM78P210N Instruction 1 Executed • 57 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM A Package Type OTP MCU EM78P210ND20J/S EM78P210NSO20J/S EM78P210NSS20J/S EM78P210NK24J/S EM78P210NSO24J/S EM78P210NSS24AJ/S Green products do not contain hazardous substances. The third edition of Sony SS-00259 standard. Pb contents should be less 100ppm Pb contents comply with Sony specs. Part No. Electroplate type Ingredient (%) Melting point (° ...
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... B Packaging Configurations B.1 EM78P210ND20 Figure B-1 EM78P210N 20-pin PDIP Package Type Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) EM78P210N 8-Bit Microcontroller with OTP ROM Symbal Min Normal E A 0.381 A1 3.175 A2 c 0.203 25.883 26.060 26.237 D 6.220 E1 7.370 E 8.510 eB B 0.356 B1 1 ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM B.2 EM78P210NSO20 b e Figure B-2 EM78P210N 20-pin SOP Package Type 60 • Symbal Min 2.350 A 0.102 A1 b 0.230 c 7.400 E 10.000 H 12.600 D 0.630 L e θ c TITLE: SOP-20L(300MIL) PACKAGE OUTLINE DIMENSION File : Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) ...
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... B.3 EM78P210NSS20 b e Figure B-3 EM78P210N 20-pin SSOP Package Type Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) 8-Bit Microcontroller with OTP ROM Symbal A 0.050 A1 1.620 A2 0.220 b c 0.090 7.400 E 5.000 E1 6.900 D 0.650 θ c TITLE: L1 SSOP-20L(209MIL) OUTLINE PACKAGE PACKA OUTLINE ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM B.4 EM78P210NK24 24 1 Figure B-4 EM78P210N 24-pin Skinny DIP Package Type 62 • (This specification is subject to change without further notice) Symbal Min Normal Max 5.334 A 0.381 A1 3.175 3.302 3.429 A2 c 0.203 0.254 0.356 31.750 31.801 31.852 D 6 ...
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... B.5 EM78P210NSO24 b e Figure B-5 EM78P210N 24-pin SOP Package Type Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) 8-Bit Microcontroller with OTP ROM Symbal Min 2.350 A 0.102 A1 b 0.230 c 7.400 E 10.000 H 15.200 D 0.630 L e θ c TITLE: SOP-24L(300MIL) PACKAGE OUTLINE DIMENSION File : ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM B.6 EM78P210NSS24A Figure B-6 EM78P210N 24-pin SSOP Package Type 64 • (This specification is subject to change without further notice) Symbal Min Normal Max 1.65 1.75 1.85 b 0.22 - 0.38 c 0.25 0. 8.20 8.50 7.90 E 7.80 7.400 8.200 E1 5.00 5.60 5. 0.65 L 0.55 0.95 0. 1.25 0° 8° θ - TITLE: SSOP-24L(209MIL) PACKAGE OUTLINE DIMENSION ...
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... The MCU will then continue to execute the next program. Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) 8-Bit Microcontroller with OTP ROM Test Conditions ----225±5 ° ----240±5 ° EM78P210N Remarks For SMD IC (such as SOP, QFP, SOJ, etc) IP_ND,OP_ND,IO_ND IP_NS,OP_NS,IO_NS IP_PD,OP_PD,IO_PD, IP_PS,OP_PS,IO_PS, VDD-VSS(+),VDD_VS S (-) mode • ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM D How to Use the ICE210N ICE210N for EM78P210N JP3 JP3 OSCI P53 OSCI P53 Oscillator Crystal, ERC Modes select Crystal (OSCI) Oscillator IRC Modes select I/O Port (P53) 66 • JP5 P53/OSCI Pin Select Crystal, ERC (OSCI) I/O Port (P53) Product Specification (V1 ...
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... P71 P72 28 P81//RESET 20 19 P53/OSCI 18 P52/OSCO P70 17 P71/CO/INT1 16 P72/CIN+ 15 P73/CIN P67 12 P66 P65 11 EM78P210N 8-Bit Microcontroller with OTP ROM P61 P62 P63 P64 P50 P51 P73 P67 P66 P65 P57 P54 1 P81//RESET P55 24 2 P56/TCC 23 P53/OSCI 3 VDD ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM • Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) 1 P55 P81 28 P56 P53 VDD P52 VSS P70 P77 P71 P60 P72 P61 P73 P62 P67 P63 P66 P64 P65 P50 P57 ...
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... Sleep → Normal ) Condition: 5V, 4MHz P52, P53 Function Comparator Function WDT Time-out time (Prescaler = Condition: VDD = 5V Code Option Operating Mode EM78P210N-V Package Version Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) Item EM78P210N 12MHz, 4. 8MHz, 3. 4MHz, 2.1V 64 μs Output only Comparator only 16.5 ms ± ...
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... EM78P210N 8-Bit Microcontroller with OTP ROM 70 • Product Specification (V1.2) 04.22.2008 (This specification is subject to change without further notice) ...