em78p210n ELAN Microelectronics Corp, em78p210n Datasheet - Page 18

• Manufacturer Part Number: em78p210n
• Description: 8-bit Microcontroller With Otp Rom
• Manufacturer: ELAN Microelectronics Corp

EM78P210N
8-Bit Microcontroller with OTP ROM
12 •
Bit 1 (ICIF): Port 6 input status change interrupt flag. Set when Port 6 input changes.
Bit 0 (TCIF): TCC overflow interrupt flag. Set when TCC overflows. Reset by software.
6.2.15 Bank 1-R5 ~R7 (I/O Port Control Register)
Bank 1-R5, R6 and R7 registers are all readable and writable.
6.2.16 Bank 1-R8 (I/O Port Control Register)
Bits 7~2, 0: not used, fixed to 0 all the time
Bit 1 (C81): 0 = defines the relative I/O pin as output
[Note]: P81 is input or open-drain for output pin.
6.2.17 Bank 1-R9 (Reserve)
Bits 7~0: not used, fixed to 0 all the time
6.2.18 Bank 1-RA (CMPCON: Comparator Control Register)
Bit 7 (EIS1):
Bit 7
EIS1
Bit 7
0
■ Bank 0-RF <2, 1, 0> can be cleared by instruction but cannot be set.
■ Bank 1-RF <2, 1, 0> is an interrupt mask register.
■ Interrupt results from "logic AND" of Bank 0-RF <2, 1, 0> and Bank 1-RF <2, 1, 0>
with instruction “ENI”.
0 = no interrupt occurs
1 = with interrupt request
0 = no interrupt occurs
1 = with interrupt request
0 = defines the relative I/O pin as output
1 = puts the relative I/O pin into high impedance
1 = puts the relative I/O pin into high impedance
Reset by software.
Bit 6
EIS0
Control bit used to define the function of the P71 (/INT1) pin
0 = P71, normal I/O pin
1 = /INT1, external interrupt pin. In this case, the I/O control bit of P71
Bit 6
0
(Bit 1 of Bank 1-R7) must be set to "1".
CMPOUT
Bit 5
Bit 5
0
CMPCOS1 CMPCOS0
Bit 4
(This specification is subject to change without further notice)
Bit 4
NOTE
0
Bit 3
Product Specification (V1.2) 04.22.2008
Bit 3
0
Bit 2
0
Bit 2
0
Bit 1
Bit 1
0
C81
Bit 0
Bit 0
0
0