cl-ps6700 Cirrus Logic, Inc., cl-ps6700 Datasheet - Page 13

• Manufacturer Part Number: cl-ps6700
• Description: Low-power Pc Card Controller For The Cl-ps7111
• Manufacturer: Cirrus Logic, Inc.

CL-PS6700
Low-Power PC Card Controller
2.1.2 Access Control Signals
Signal
PDREQ_L/
GPIO
2.1.3 Interrupt and Abort Signals
Signal
2.1.4 Clock, Reset, and Sleep Signals
Signal
PCLK
RESET_L
PSLEEP_L
November 1997
PIRQ_L[1:0] OD-O
Type
Type
I/O
Type
I
I
I
Source
Power
Source
Power
Source
sys
Power
sys
sys
sys
PRELIMINARY DATA BOOK v1.0
sys
Description
PC Card DMA Request: When configured as PDREQ_L, this wire-OR’ed signal indicates to the
CL-PS7111 that one of the PC Card sockets has issued a DMA request. Since this is shared by all
PC Card sockets, the system should enable DMA to only one socket at a time and program the
CL-PS7111 DMA routine.
General-Purpose I/O: When configured as GPIO, this signal can be used as an input capable of
generating an interrupt. As a general-purpose output, it is actively driven in both output states, high
and low.
C
Description
All transfers between the CL-PS7111 and the CL-PS6700 are synchronous to this clock signal. To
conserve power, PCLK can be disabled when the PC Card subsystem is not in use.
This reset signal can be driven by one of the GPIO outputs of the CL-PS7111 or by a system
reset. It is an active-low input and places all CL-PS6700 registers and outputs in their default
power-up/reset condition.
The CL-PS7111 drives this signal either by the RUN output or by any GPIO. This active-low signal
is synchronous to the rising edge of PCLK. PSLEEP_L causes the CL-PS6700 to complete or
abort (as configured) any card operation in progress, enter the lowest power mode, and disable
its I/O according to the
CL-PS6700 before asserting PSLEEP_L; if a card transaction in progress or in the queue is lost
due to PSLEEP_L being asserted, an interrupt (RD_FAIL or WR_FAIL) is generated. There must
be two PCLKs after PSLEEP_L is asserted to go into Standby mode.
Description
PC Card Interrupt Request: The interrupt request lines can be wire-OR’ed if there are two
CL-PS6700 controllers. It signals that one or two CL-PS6700s have an interrupt pending. The
exact source of pending interrupts can be read in a CL-PS6700 Interrupt Source register. Exter-
nal pull-up resistors for these signals are required. Alternatively, every interrupt request line can
be connected to one of the CL-PS7111 active-low interrupt inputs.
I R R U S
L
(cont.)
O G I C
C
O N F I D E N T I A L
Table 4-2 on page
, N D A R
32. The CL-PS7111 can discontinue transactions to
E Q U I R E D
PIN DESCRIPTIONS
13