cl-ps6700 Cirrus Logic, Inc., cl-ps6700 Datasheet - Page 17

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cl-ps6700

Manufacturer Part Number
cl-ps6700
Description
Low-power Pc Card Controller For The Cl-ps7111
Manufacturer
Cirrus Logic, Inc.
Datasheet

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Part Number
Manufacturer
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Part Number:
cl-ps6700-VC-A
Manufacturer:
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Quantity:
20 000
CL-PS6700
Low-Power PC Card Controller
2.2.5 Card Voltages and Reset Signals
Signal
PCM_VS[2:1]
PCTL[2:0]
PCM_RESET
2.3 Power and Ground Pins
Signal
V3V_Core
V3V_O
V5V_O
VDD_HI
VSS_Core
VSS_O
November 1997
Group
Type
VDDhi
I/O
core
pcm
I/O
sys
O
Source
Power
VDDhi Single-mode. These signals inform the host system of the voltage requirements and capabilities
VDDhi Single-mode. These GPIO signals typically control the corresponding card’s power module or
PRELIMINARY DATA BOOK v1.0
pcm
Description
Power to core logic; either 5 V or 3.3 V.
Power to system interface I/O buffers; either 5 V or 3.3 V, but must be the same as the CL-PS7111
power plane (V3V_Core).
Power to PC Card interface I/O buffers; either 5 V, 3.3 V, or 0 V.
This pin should be tied to the highest voltage in the system (as seen by CL-PS6700; either 5 V or 3.3
V).
Ground pins for the core and input buffers.
Ground pins for output buffers.
C
I R R U S
Description
of the card for reading its CIS before applying power to the card. This allows 3.3-V only cards
(which need not support 5-V operation during configuration). VS[2] primarily differentiates
between 3.3- and 5-V cards, while VS[1] primarily differentiates between 3.3-V and X.X-V
cards.
These signals, and the three power control signals, are bidirectional signals under software
control (register bits) for flexibility. All five signals are capable of generating interrupts. VS[2] can
also be configured to act as the card DREQ input.
switch. They determine the proper voltage for the V
signals are directly controlled by register bits and thus, can control serially-controlled power
modules. They can also be programmed to transition to a new value automatically when the
PSLEEP_L input is asserted to automatically shut down card power in case of power fault con-
ditions. PCTL[2:0] are inputs during reset and therefore require an external pull-down or pull-up
resistor to avoid power being applied to the card socket.
Single-mode. This signal resets the PC Card, placing it into its default memory-only mode. The
signal remains in a high-impedance state after power-on or system reset. Cards that implement
the reset function pull up this signal with >100 k . The CPU (after >1 ms) should pull this signal
low by writing a ‘0’ to bit 12 of the Card Interface Configuration register.
L
O G I C
C
O N F I D E N T I A L
, N D A R
CC
E Q U I R E D
and/or the V
PP
PIN DESCRIPTIONS
pins of the socket. These
17

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