cl-ps6700 Cirrus Logic, Inc., cl-ps6700 Datasheet - Page 15

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cl-ps6700

Manufacturer Part Number
cl-ps6700
Description
Low-power Pc Card Controller For The Cl-ps7111
Manufacturer
Cirrus Logic, Inc.
Datasheet

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Part Number
Manufacturer
Quantity
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Part Number:
cl-ps6700-VC-A
Manufacturer:
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Quantity:
20 000
CL-PS6700
Low-Power PC Card Controller
2.2.2 Access Control Signals
Signal
PCM_REG_L
PCM_WP
PCM_WAIT_L
PCM_RDY
November 1997
Type
O
I
I
I
PRELIMINARY DATA BOOK v1.0
Source
Power
pcm
pcm
pcm
pcm
C
I R R U S
Description
Single-mode. This signal, in conjunction with the card data strobes, PCM_OE_L,
PCM_WE_L, PCM_IORD_L, and PCM_IOWR_L, determine which of the three address
spaces (I/O, common memory, or attribute memory) is chosen and if the transfer is a DMA or
non-DMA type.
1 – common memory or DMA access
0 – I/O space or attribute memory space access
Dual-mode.
Memory Mode: This signal indicates that the card has been set to be write-protected.
I/O Mode: This signal becomes IOIS16_L. An asserted level (low) indicates that the I/O card
is a 16-bit device. If IOIS16_L is not asserted (high), the device is assumed to be 8-bit, and
data transfer occurs over byte lane D[7:0]. In this mode, the WP status of the card is avail-
able as an on-card register bit.
DMA Mode: This signal can be selected as DREQ from the PC Card.
Single-mode. This data wait signal is used by the card to delay completion of an in-progress
memory or I/O access cycle. It is sampled by the CL-PS6700 with a flip-flop clocked on the
rising edge of PCLK, then fed to the card interface logic. In order to be recognized, this sig-
nal must be asserted at least two clocks before the end of the command strobe.
Dual-mode.
Memory Mode: This signal is deasserted while the card is busy processing a previous
transfer. It is intended to signal the completion of potentially lengthy operations within the
card. This signal is available as a status bit for polling by the CPU, and can generate an
interrupt to the CPU. It can also form the PRDY signal to the CL-PS7111 for handshake, pre-
venting masters from targeting a busy card.
I/O Mode: This signal is IREQ_L, an interrupt request generated by the I/O card. The RDY
function of memory mode is available as an on-card register bit.
DMA Mode: This input can be selected as DREQ from the PC Card.
Table 2-5. PC Card Access Types
Card Access Type
Common Memory Read/Write
Attribute Memory Read/Write
Card I/O Read/Write
Card DMA Read/Write
L
(cont.)
O G I C
C
O N F I D E N T I A L
, N D A R
Terminal count
PCM_WE_L
PCM_OE_L
Data strobe
Data strobe
Deasserted
E Q U I R E D
PCM_IOWR_L
PCM_IORD_L
Deasserted
Deasserted
Data strobe
Data strobe
PIN DESCRIPTIONS
PCM_REG_L
Deasserted
Deasserted
Asserted
Asserted
15

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