k9k1208u0m-ycb0 Samsung Semiconductor, Inc., k9k1208u0m-ycb0 Datasheet - Page 8

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k9k1208u0m-ycb0

Manufacturer Part Number
k9k1208u0m-ycb0
Description
64m X 8 Bit Nand Flash Memory
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
AC Timing Characteristics for Command / Address / Data Input
AC Characteristics for Operation
K9K1208U0M-YCB0, K9K1208U0M-YIB0
CLE setup Time
CLE Hold Time
CE setup Time
CE Hold Time
WE Pulse Width
ALE setup Time
ALE Hold Time
Data setup Time
Data Hold Time
Write Cycle Time
WE High Hold Time
Data Transfer from Cell to Register
ALE to RE Delay( ID read )
ALE to RE Delay(Read cycle)
CE to RE Delay( ID read)
Ready to RE Low
RE Pulse Width
WE High to Busy
Read Cycle Time
RE Access Time
RE High to Output Hi-Z
CE High to Output Hi-Z
RE High Hold Time
Output Hi-Z to RE Low
Last RE High to Busy(at sequential read)
CE High to Ready(in case of interception by CE at read)
CE High Hold Time(at the last serial read)
RE Low to Status Output
CE Low to Status Output
WE High to RE Low
RE access time(Read ID)
Device Resetting Time(Read/Program/Erase)
NOTE : 1. If tCS is set less than 10ns, tWP must be minimum 35ns, otherwise, tWP may be minimum 25ns.
NOTE :
1. The time to Ready depends on the value of the pull-up resistor tied R/B pin.
2. To break the sequential read cycle, CE must be held high for longer time than tCEH.
3. If reset command(FFh) is written at Ready state, the device goes into Busy for maximum 5us.
Parameter
Parameter
(2)
Symbol
t
t
t
t
t
t
t
t
t
t
t
CLS
CLH
ALH
ALS
WP
WC
WH
CS
CH
DS
DH
8
Symbol
t
READID
t
t
t
t
t
t
t
t
t
RSTO
CSTO
t
t
t
t
WHR
t
t
t
AR1
AR2
t
REA
RHZ
CHZ
REH
t
CRY
CEH
RST
WB
t
t
CR
RR
RP
RC
RB
IR
R
25
Min
10
10
10
20
15
60
25
0
0
0
(1)
Min
100
100
100
50
20
30
60
15
25
60
0
-
-
-
-
-
-
-
-
-
-
FLASH MEMORY
Max
50 +tr(R/B)
5/10/500
-
-
-
-
-
-
-
-
-
-
-
Max
100
100
10
35
30
20
35
45
35
-
-
-
-
-
-
-
-
-
-
(3)
(1)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s

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