DS2465 MAXIM [Maxim Integrated Products], DS2465 Datasheet
DS2465
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DS2465 Summary of contents
Page 1
... The 1-Wire line can be powered down under software control. Strong pullup features sup- port 1-Wire power delivery to 1-Wire devices such as EEPROMs. When not in use, the DS2465 can be put in sleep mode where power consumption is minimal. Applications Authentication of Consumables ...
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... 2.97V, 4mA load (Note 3) APU CC Standard t F Overdrive Standard t RSTL Overdrive t Standard and overdrive RSTH Standard t MSP Overdrive Standard t SI Overdrive Standard t W1L Overdrive DS2465 MIN TYP MAX 2.97 3.3 3.63 750 = 3.63V 0.5 1.0 CC 1.0 1 375 500 750 750 1000 1350 0.25 0.95 1.2 ...
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... Pin at 3.63V (Note (Note 12) SWUP (Note 3) HYS (Note (Note (Notes 3, 14) I DS2465 MIN TYP MAX UNITS 11.4 12 13.1 Fs 1.4 1.5 1.64 See -5% +9% Fs Table 6 See -5% +9% Fs Table 6 Equal W0L REC0 ...
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... C timing values are referred to V Note 14: I/O pins of the DS2465 do not obstruct the SDA and SCL lines if V Note 15: The DS2465 provides a hold time of at least 300ns for the SDA signal (referenced to the V bridge the undefined region of the falling edge of SCL. Note 16: The maximum t ...
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... Master Status register and data through the 1-Wire Read Data register. All registers, the user memory and a scratchpad are located in a linear address space for direct access. The DS2465 communicates with a host processor through its fast mode. See ...
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... SCL SLPZ GND Figure 1. Block Diagram Figure 2 shows the memory organization of the DS2465. The memory begins at address 00h with the input scratchpad. The register section follows at address 60h. Addresses volatile SRAM. The 1-Wire port configuration settings have default values that are loaded automatically during power-on. The address range 70h and higher is non- � ...
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... A0h to BFh C0h to FFh Figure 2. Memory Map Device Registers The registers of the DS2465 fall into three categories: write-only, read-only and read/write. Write-only applies to the command register. Status registers, the 1-Wire read data register read-only. The configuration registers can be read and written ...
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... The same result applies to a 1-Wire Single Bit command that sends a 1 bit. Bit 4: Device Reset (RST). If the RST bit is 1, the DS2465 has performed an internal reset cycle, either caused by a power-on reset, a low pulse at SLPZ, or from executing the Device Reset command. The RST bit is cleared automatically when the 1-Wire Master Configuration register is updated by the host processor ...
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... If SPU is 1, the DS2465 treats the rising edge of the time slot in which the strong pullup starts as if the active pullup was activated. However, in contrast to the active pullup, the strong pullup, i.e., the internal pullup transistor, remains con- ...
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... The default state of PDN is 0, enabling normal operation. When PDN is changed 1-Wire communication is possible. To end the 1-Wire power-down state, the PDN bit needs to be changed exit the DS2465 from sleep mode, change the SLPZ pin state from This forces the DS2465 to perform a power-on reset and clears PDN to 0 for normal operation. ...
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... LINE IS DISCHARGED Figure 4. Rising Edge Pullup During a Time Slot The DS2465 allows adapting several timing parameters and the pullup resistor to the application’s needs. Each of these parameters has its own 1-Wire Port Configuration register, located in the address range from 68h to 6Dh t ...
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... Note: The power-on default values are bold. This byte reads AAh. This byte reads 00h. The DS2465 understands function commands. The feedback path to the host is controlled by a read pointer, which is set automatically by each function command for the host to efficiently access relevant information. The host processor ...
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... Refer to the full data sheet. For depending on the parameter byte, counted from the PROG PROG rising SCL edge of the parameter byte acknowledge bit busy duration + 1.09µs None 1-Wire Master Status register None None None DS2465 2 C address immediately ...
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... Maxim Integrated Products 15 BIT 5 BIT 4 BIT 3 TT F/S Refer to the full data sheet for this information. DS2465 BIT 2 BIT 1 BIT 0 SEG# ...
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... Master Status Register, bits PPD and SD. 1-Wire activity must have ended before the DS2465 can process this command. Command code is not acknowledged if 1WB = 1 at the time the command code is received and the command is ignored. ...
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... Generates a single 1-Wire time slot as specified by the parameter byte at the 1-Wire line; reads the logic level at the 1-Wire line at t 1-Wire activity must have ended before the DS2465 can process this command. Command code is not acknowledged if 1WB = 1 at the time the command code is received and the command is ignored ...
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... F PULLUP NOTE: DEPENDING ON ITS INTERNAL STATE, A 1-Wire SLAVE DEVICE TRANSMITS DATA TO ITS MASTER (e.g., THE DS2465). WHEN RESPONDING WITH 1-Wire SLAVE STARTS PULLING THE LINE LOW DURING t STARTS RISING AGAIN. WHEN RESPONDING WITH 1-Wire SLAVE DOES NOT HOLD THE LINE LOW AT ALL, AND THE VOLTAGE STARTS RISING AS SOON OVER ...
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... Single Bit commands, but faster due to less I Writes a single data byte to the 1-Wire line. 1-Wire activity must have ended before the DS2465 can process this command. Command code is not acknowledged if 1WB = 1 at the time the command code is received and the command is ignored. ...
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... Generates eight read-data time slots on the 1-Wire line and stores result in the 1-Wire Read Data Register. 1-Wire activity must have ended before the DS2465 can process this command. Command code is not acknowledged if 1WB = 1 at the time the command code is received and the command is ignored. ...
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... If the read time slots are both 0 (a typical case), the parameter byte determines the type of the subsequent write time slot. 1-Wire activity must have ended before the DS2465 can process this command. Command code is not acknowledged if 1WB = 1 at the time the command code is received and the command is ignored ...
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... Begins maximum 1.09µs after the rising SCL edge of the parameter byte acknowledge bit. 1-Wire Master Status register (for busy polling). 1WB (set to 1 for SLOT 1WS, APU apply and R current values apply. REC0 W1L WPU BIT 5 BIT 4 BIT 3 DS2465 To read memory data ). BIT 2 BIT 1 BS BIT 0 ...
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... After each byte follows an acknowledge DETERMINES bit to allow synchronization between master and slave. READ OR WRITE The slave address to which the DS2465 responds is shown Interface address/control byte. The last bit of the slave address/ control byte (R/W) defines the data direction ...
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... MAC computation or EEPROM write cycle sleep mode. In this case, the slave does not acknowl- edge its slave address and leaves the SDA line high. A slave that is ready to communicate acknowledges at least its slave address. However, some time later the DS2465 HD:STA ...
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... In response, the slave releases SDA, allowing the master to generate the STOP condition. To write to the DS2465, the master must access the device in write access mode, i.e., the slave address must be sent with the direction bit set to 0. The next byte to be ...
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... Table 27 for the I C communication 2 C Communication—Legend DESCRIPTION START Condition Select DS2465 for Write Access Select DS2465 for Read Access Repeated START Condition STOP Condition Acknowledged Not Acknowledged Bus Not Busy Transfer of One Byte Command “Copy Scratchpad”, 5Ah Refer to the full data sheet. ...
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... Maxim Integrated Products Communication Examples (continued Programming DS2465 ...
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... A In the first cycle, the master sends the command; then the master waits (Idle) for the 1-Wire Reset to complete. In the second cycle the DS2465 is accessed to read the result of the 1-Wire Reset from the 1-Wire Master Status register. Case B: 1-Wire Idle (1WB = 0), Busy Polling Until the 1-Wire Command is Completed, then Read the Result ...
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... Bit command. Case C: 1-Wire Busy (1WB = 1) S AD,0 A 60h A 1WSB A\ The master should stop and restart as soon as the DS2465 does not acknowledge the command code. 1-Wire Write Byte, e.g., to Send a Command Code to the 1-Wire Line Case A: 1-Wire idle (1WB = 0), No Busy Polling S AD,0 A 60h A ...
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... Case C: 1-Wire Busy (1WB = 1) S AD,0 A 60h A 1WRB A\ The master should stop and restart as soon as the DS2465 does not acknowledge the command code. 1-Wire Triplet, e.g., to Perform a Search ROM Function on the 1-Wire Line Case A: 1-Wire Idle (1WB = 0), No Busy Polling S AD,0 A 60h A 1WT A < ...
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... The parameter byte is always acknowledged, regardless of its value (is always valid). Case B: 1-Wire Busy (1WB = 1) S AD,0 A 60h A 1WRB A\ The master should stop and restart as soon as the DS2465 does not acknowledge the command code. Ordering Information PART TEMP RANGE DS2465P+ -40°C to +85NC DS2465P+T -40°C to +85NC +Denotes a lead(Pb)-free/RoHS-compliant package ...
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... Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2012 Maxim Integrated Products © DESCRIPTION Maxim is a registered trademark of Maxim Integrated Products, Inc. DS2465 Revision History PAGES CHANGED — 43 ...