DS2465 MAXIM [Maxim Integrated Products], DS2465 Datasheet - Page 20

• Manufacturer Part Number: DS2465
• Description: SHA-256 Coprocessor with 1-Wire Master Function
• Manufacturer: MAXIM [Maxim Integrated Products]

Table 23. Parameter Byte Bitmap
X = Don’t care
Bit 7: Bit value (V). This bit specifies the branch direction to be taken if both, the first and the second read time slot
read a 0. If V = 0, a write-zero time slot is generated. If V = 1, a write-one time slot is generated.
SHA-256 Coprocessor with 1-Wire Master Function
1-Wire Triplet
Command Code
Parameter Byte
Usage
Other Notes
Command Restrictions
Error Conditions (Error Response)
MAC Notes
I
Command Duration
1-Wire Activity
Read Pointer Position
Master Status Bits Affected
Master Configurations Affected
1-Wire Port Configurations Affected
2
C Busy Duration
BIT 7
V
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BIT 6
X
BIT 5
X
78h
Branch Direction (Table 23)
To perform a 1-Wire Search ROM sequence; a full sequence requires this command
to be executed 64 times to identify and address one device.
Generates three time slots: two read time slots and one write time slot at the 1-Wire
line. The type of write time slot depends on the result of the read time slots and the
direction byte.
• If the read time slots are 0 and 1, they are followed by a write-zero time slot.
• If the read time slots are 1 and 0, they are followed by a write-one time slot.
• If the read time slots are both 1 (error case), the subsequent write time slot is a
write-one.
• If the read time slots are both 0 (a typical case), the parameter byte determines the
type of the subsequent write time slot.
1-Wire activity must have ended before the DS2465 can process this command.
Command code is not acknowledged if 1WB = 1 at the time the command code is
received and the command is ignored.
N/A
None
3 x t
byte acknowledge bit.
Begins maximum 1.09µs after the rising SCL edge of the parameter byte acknowledge
bit.
1-Wire Master Status register (for busy polling and data reading).
1WB (set to 1 for 3 x t
updated at the second t
1WS, APU apply.
t
W0L
SLOT
, t
W1L
BIT 4
+ maximum 1.09µs, counted from the rising SCL edge of the parameter
, t
X
REC0
, and R
SLOT
MSR
WPU
BIT 3
), SBR is updated at the first t
X
(i.e., at t
current values apply.
SLOT
+ t
BIT 2
X
MSR
).
MSR
BIT 1
, TSB and DIR are
X
DS2465
BIT 0
X