oxfw911 ETC-unknow, oxfw911 Datasheet

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... Manager supports PIO modes DMA modes and Ultra DMA mode and provides the interface to the IDE bus compliant with T13-1321D, ATA-5 specification, as well as support Oxford Semiconductor 2001 OXFW911 Data Sheet Revision 1.1 – Mar 2001 Part No. OXFW911-TQ-A the IEEE OUI commands, and for ATA100. ...

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... PIN INFORMATION .....................................................................................................................4 3 PIN DESCRIPTIONS....................................................................................................................5 4 OPERATING CONDITIONS .......................................................................................................... ELECTRICAL CHARACTERISTICS ........................................................................................7 5.1 I/O BUFFERS ........................................................................................................................................................................ ELECTRICAL CHARACTERISTICS ........................................................................................8 6.1 IDE INTERFACE ................................................................................................................................................................... 8 6.2 1394 LINK-PHY INTERFACE ............................................................................................................................................. 11 6.3 EXTERNAL PROCESSOR INTERFACE............................................................................................................................ 13 7 TIMING WAVEFORMS...............................................................................................................14 8 PACKAGE INFORMATION ........................................................................................................29 9 ORDERING INFORMATION .......................................................................................................29 NOTES ............................................................................................................................................31 CONTACT DETAILS.........................................................................................................................32 DISCLAIMER ...................................................................................................................................32 Data Sheet Rev 1.1 OXFW911 Page 2 ...

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... EE_CK EE_CS Data Sheet Rev 1.1 Buffer RAM RAM Manager Link-Phy interface ORB Co- processor External Device interface ARM7TDMI Internal FLASH SCRATCH GPIO / RAM EEPROM interface Figure 1: OXFW911 Block Diagram OXFW911 IDE_OE# ID[15:0] DMARQ DIOW# ATA/ DIOR# ATAPI IORDY manager DMACK# INTRQ# IA[2:0] ICS#[1:0] Page 3 ...

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... GND 118 PHYCLK 119 VDD 120 LREQ 121 NC 122 CS3# 123 CS2# 124 GPO1 125 GPO2 126 GPO3 127 CKOUT 128 Data Sheet Rev 1.1 Figure 2: Pinout (package = 128 TQFP) OXFW911 64 IRESET 63 IDE_OE# 62 INTRQ 61 INT VDD 58 GPI 57 UIF 56 RESET# 55 GND ...

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... General Purpose Output 2 O GPO3 General Purpose Output 3 GPI General Purpose Input IU RESET# Global reset for the OXFW911. Active Low. CKOUT Clock output. 49.152 MHz clock output. I TEST_SEL, ‘100’ = NORMAL OPERATION. Other settings are for TEST[1:0] foundry test purposes only. ...

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... Data Sheet Rev 1.1 AC GND Supplies GND to output buffers in switching (AC) state DC GND Ground (0 volts). Supplies GND to core logic, input buffers and output buffers in steady state No Connect Table 1: Pin Descriptions T_O 5V tolerant output T_I/O 5V tolerant bi-directional GND Ground VDD 3.3V power NC No Connect OXFW911 Page 6 ...

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... OL I 3-state output leakage current OZ Symbol Parameter Operating supply current in normal mode I CC Operating supply current in Power-down mode Table 4: Characteristics of OXFW911 I/O buffers Data Sheet Rev 1.1 Table 2: Absolute maximum ratings Condition Commercial CMOS Interface CMOS Schmitt trig CMOS Interface 1 CMOS Schmitt trig ...

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... DIOR# / DIOW# to address valid hold tRD Read Data Valid to IORDY active if IORDY initially low after tA tA IORDY Setup time tB IORDY Pulse Width ( max ) tA IORDY assertion to release Table 5: OXFW911 IDE PIO / Register Transfers Data Sheet Rev 1.1 Mode 0 Mode 1 Mode 2 Mode 3 600 400 360 80 80 ...

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... DIOW# negated pulse width tLr DIOR# to DMARQ delay ( max ) tLw DIOW# to DMARQ delay ( max ) tM IDCS[1:0] valid to DIOR# / DIOW# tN IDCS[1:0] hold tZ DMACK to tristate ( max ) Data Sheet Rev 1.1 Mode 0 Table 6: OXFW911 Multiword DMA timings OXFW911 Mode 1 Mode 2 Units 480 160 120 ns 240 ...

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... Table 7: OXFW911 Ultra DMA timings OXFW911 Mode1 Mode 2 Mode 2 Units max min max 120 117 200 0 170 ns 150 0 150 ...

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... IORDY tack Setup and hold times DMACK# (before assertion or negation ) tss Time from STROBE edge to negation of DMARQ or assertion of STOP (when sender terminates a burst ) Table 7a: OXFW911 Ultra DMA timings (cont) Data Sheet Rev 1.1 Mode 3 Mode 3 Mode 4 min max min 100 ...

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... Delay Time, PhyClk input high to subsequent instance(s) of PD[7:0], CTL[1:0] and Lreq outputs valid Tld3 Delay Time, PhyClk input high to PD[7:0], CTL[1:0] and Lreq outputs invalid (high impedance) tcyc Duty Cycle Table 8: OXFW911 Link-Phy interface timings Data Sheet Rev 1.1 OXFW911 Min Max Units 8 ns ...

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... Data hold after CSx# and OE# rising Common Write Timings twds Data valid to WE# rising twdh Data hold after WE# rising tcsw CS# setup before WE# valid tadw Address setup before WE# valid twe WE# valid Table 9: External Processor Interface timings Data Sheet Rev 1.1 OXFW911 min (ns) max (ns 300 60 40+tws ...

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... Device negated IORDY before tA. IORDY is released prior to negation and may be asserted for no more than 5ns before release : wait generated. The cycle completes after IORDY is reasserted. For cycles where a wait is generated and DIOR# is asserted, the device shall place read data on DD[7:0] for tRD before asserting IORDY Data Sheet Rev 1 OXFW911 t9 t2i t3 t4 t6z t5 t6 tRD ...

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... OXFORD SEMICONDUCTOR LTD IMING AVEFORMS CS0# / CS1# tM DMARQ DMACK# tI DIOR# / DIOW# tE READ ID[15:0] WRITE ID[15:0] Figure 4: MultiWord DMA transfer to / from IDE device Data Sheet Rev 1 OXFW911 Page 15 ...

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... OXFORD SEMICONDUCTOR LTD. DMARQ (device) tui tack DMACK(host) STOP(host) (DIOW#) HDMARDY(host) (DIOR#) DSTROBE(device) (IORDY) ID[15:0] tack IA[2:0], ICS#[1:0] Figure 5: Initiating an Ultra DMA data-in burst Data Sheet Rev 1.1 tenv tfs tzad tziordy tdvs taz OXFW911 tdvh Page 16 ...

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... OXFORD SEMICONDUCTOR LTD. DSTROBE(device) (IORDY) tdvh ID[15:0] (device) DSTROBE(host) IORDY tdh ID[15:0] (host) Data Sheet Rev 1.1 t2cyc tcyc tcyc tdvh tdvs tds tdh Figure 6: Sustained Ultra DMA data-in burst OXFW911 tdvh tdvs tdh tds Page 17 ...

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... OXFORD SEMICONDUCTOR LTD. DMARQ(device) DMACK(host) STOP(host) DIOW# DSTROBE(device) IORDY DSTROBE(device) IORDY ID[15:0] (host) Figure 7: Host pausing an Ultra DMA data-in burst Data Sheet Rev 1.1 trp tsr trfs OXFW911 Page 18 ...

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... OXFORD SEMICONDUCTOR LTD. DMARQ(device) DMACK(host) STOP(host) DIOW# HDMARDY(host) DIOR# tss DSTROBE(device) IORDY taz ID[15:0] (host) IA[2:0], ICS[1:0] Figure 8: Device terminating an Ultra DMA data-in burst Data Sheet Rev 1.1 tli tli tmli tzah OXFW911 tack tiordyz CRC tack Page 19 ...

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... OXFORD SEMICONDUCTOR LTD. DMARQ(device) DMACK(host) trp STOP(host) DIOW# HDMARDY(host) DIOR# trfs DSTROBE(device) IORDY ID[15:0] (host) IA[2:0], ICS[1:0] Figure 9: Host terminating an Ultra DMA data-in burst Data Sheet Rev 1.1 tzah taz tack tli tmli tdvs CRC tack OXFW911 tiordyz tdvh Page 20 ...

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... OXFORD SEMICONDUCTOR LTD. DMARQ (device) tui tack DMACK(host) STOP(host) (DIOW#) HSTROBE(host) (DIOR#) DDMARDY(device) (IORDY) ID[15:0] tack IA[2:0], ICS#[1:0] Figure 10: Initiating an Ultra DMA data-out burst Data Sheet Rev 1.1 tenv tli tui tziordy tdvs OXFW911 tdvh Page 21 ...

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... OXFORD SEMICONDUCTOR LTD. HSTROBE(host) tdvh ID[15:0] (host) HSTROBE(device) tdh ID[15:0] (device) Figure 11: Sustained Ultra DMA data-out burst Data Sheet Rev 1.1 t2cyc tcyc tcyc tdvh tdvs tdvs tds tdh tds OXFW911 tdvh tdh Page 22 ...

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... OXFORD SEMICONDUCTOR LTD. DMARQ(device) DMACK(host) STOP(host) DIOW# DDMARDY(device) IORDY# HSTROBE(host) DIOR# ID[15:0] (host) Figure 12: Device pausing an Ultra DMA data-in burst Data Sheet Rev 1.1 trp tsr trfs OXFW911 Page 23 ...

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... OXFORD SEMICONDUCTOR LTD. DMARQ(device) DMACK(host) STOP(host) DIOW# DDMARDY(device) IORDY# tss HSTROBE(host) DIOR# ID[15:0] (host) IA[2:0], ICS[1:0] Figure 13: Host Terminating an Ultra DMA data-out burst Data Sheet Rev 1.1 tli tli tmli OXFW911 tack tiordyz tdvs tdvh CRC tack Page 24 ...

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... OXFORD SEMICONDUCTOR LTD. DMARQ(device) DMACK(host) trp STOP(host) DIOW# DDMARDY(device) IORDY# trfs HSTROBE(device) DIOR# ID[15:0] (host) IA[2:0], ICS[1:0] Figure 14: Device Terminating an Ultra DMA data-out burst Data Sheet Rev 1.1 tli tli tmli tiordyz tdvs CRC OXFW911 tack tdvh tack Page 25 ...

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... OXFORD SEMICONDUCTOR LTD. CLK 1 PD[7:0] CTL[1:0] LReq CLK 1 PD[7:0] CTL[1:0] LReq tld1 Data Sheet Rev 1.1 tcyc tlh tlsu Figure 15: Phy to Link timings tcyc 2 3 tld2 Figure 16: Link to Phy timings OXFW911 4 tld3 Page 26 ...

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... OXFORD SEMICONDUCTOR LTD. Address Data tas CS# OE# WE# Address Data tas CS# OE# WE# Figure 17: External Processor Bus read timings Data Sheet Rev 1.1 taddr tws tdsa taddr tdsa tdha tws OXFW911 tdha tah taddr tdsa tdha tah tws Page 27 ...

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... OXFORD SEMICONDUCTOR LTD. Address Data tas CS# OE# WE# tcsw Address Data tas CS# OE# WE# Figure 17a: External Processor Bus write timings Data Sheet Rev 1.1 taddr tws twds twdh twe taddr twds twdh twe tadw OXFW911 tah taddr twds twdh tah twe Page 28 ...

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... OXFORD SEMICONDUCTOR LTD ACKAGE NFORMATION RDERING NFORMATION Data Sheet Rev 1.1 Figure 18: 128 TQFP package information OXFW911 Page 29 ...

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... OXFORD SEMICONDUCTOR LTD. OXFW911- Revision Package Type – 128 TQFP Data Sheet Rev 1.1 OXFW911 Page 30 ...

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... OXFORD SEMICONDUCTOR LTD. N OTES Data Sheet Rev 1.1 This page has been intentionally left blank OXFW911 Page 31 ...

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... No responsibility is assumed by Oxford Semiconductor for its use, nor for infringement of patents or other rights of third parties. No part of this publication may be reproduced, or transmitted in any form or by any means without the prior consent of Oxford Semiconductor Ltd. Oxford Semiconductor’s terms and conditions of sale apply at all times. Data Sheet Rev 1.1 OXFW911 Page 32 ...