h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 285

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h8s-2646

Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
9.8.2
Table 9.12 shows the port A register configuration.
Table 9.12 Port A Registers
Note: * Lower 16 bits of the address.
Port A Data Direction Register (PADDR)
PADDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port A. PADDR cannot be read; if it is, an undefined value will be read.
PADDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode. The OPE bit in SBYCR is used to select whether the address output pins
retain their output state or become high-impedance when a transition is made to software standby
mode.
• Modes 4 to 6
Name
Port A data direction register
Port A data register
Port A register
Port A MOS pull-up control register
Port A open-drain control register
Bit
Initial value :
R/W
These function as segment pins if the values of bits SGS3 to SGS0 of LPCR, the LCD driver,
are other than B'0000. If the value of bits SGS3 to SGS0 is B'0000, the port A pins function as
address outputs as specified by the setting of bits AE3 to AE0 of PFCR, regardless of the
values of bits PA7DDR to PA0DDR. Also, when the pins are not used as address outputs,
setting a PADDR bit to 1 makes the corresponding port A pin an output port, and clearing a bit
to 0 makes the corresponding pin an input port.
Register Configuration
:
:
PA7DDR PA6DDR PA5DDR PA4DDR PA3DDR PA2DDR PA1DDR PA0DDR
W
7
0
W
6
0
Abbreviation
PADDR
PADR
PORTA
PAPCR
PAODR
W
5
0
W
4
0
Rev. 5.00 Sep 22, 2005 page 259 of 1136
R/W
W
R/W
R
R/W
R/W
W
3
0
Initial Value
H'00
H'00
Undefined
H'00
H'00
W
2
0
Section 9 I/O Ports
REJ09B0257-0500
W
1
0
Address *
H'FE40
H'FE39
H'FF09
H'FFB9
H'FE47
W
0
0

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