LTC1409 LINER [Linear Technology], LTC1409 Datasheet
LTC1409
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LTC1409 Summary of contents
Page 1
... Two digitally selectable power Shutdown modes provide flexibility for low power systems. The LTC1409 full-scale input range is 2.5V. Maximum DC specs include 1LSB INL and 1LSB DNL over tem- perature. Outstanding AC performance includes 72.5dB S/( the Nyquist input frequency of 400kHz. ...
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... Analog Input Voltage (Note 3) .................................. V SS Digital Input Voltage (Note 4) ............ V Digital Output Voltage ............. V SS Power Dissipation............................................. 500mW Operating Temperature Range LTC1409C............................................... LTC1409I........................................... – Storage Temperature Range ................ – 150 C Lead Temperature (Soldering, 10 sec)................. 300 VERTER C HARA TERISTICS C ...
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... High OUT DD CS High (Note OUT OUT DD (Note 5) CONDITIONS (Notes 10, 11) (Note 10) CS High CONVST = SHDN = 0V, NAP/SLP = 5V CONVST = SHDN = 0V, NAP/SLP = 0V LTC1409 MIN TYP MAX 70 73.0 68 72.5 – 90 – 86 – 74 – 90 – 74 – 1.6 (Note 5) MIN TYP MAX 2 ...
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... LTC1409 W U POWER REQUIRE E TS SYMBOL PARAMETER I Negative Supply Current SS Nap Mode Sleep Mode P Power Dissipation DISS Nap Mode Sleep Mode CHARACTERISTICS SYMBOL PARAMETER f Maximum Sampling Frequency SAMPLE(MAX) t Conversion Time CONV t Acquisition Time ACQ Setup Time CONVST Setup Time ...
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... THD 2ND –90 –100 1k 10k 100k 1M INPUT FREQUENCY (Hz) LTC1409 • TPC03 f = 800kHz SAMPLE f = 88.19580078kHz IN1 f = 111.9995117kHz IN2 2fa + 2fb 3fa 2fb 3fb 200k 250k 300k 350k 400k LTC1409 • TPC05 10M 5 ...
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... LT1409 • TPC07 1M 10M LTC1409 • TPC08 (Pins 15 to 18): Three-State Data Outputs. OGND (Pin 19): Digital Ground for Output Drivers. Tie to AGND. NAP/SLP (Pin 20): Power Shutdown Mode. Selects the mode invoked by the SHDN pin. Low selects Sleep mode and high selects quick wake-up Nap mode. ...
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... DBN DBN C L LTC1409 • TC01 (b) Hi and LTC1409 ZEROING SWITCHES + COMP – 12 • OUTPUT LATCHES • • LTC1409 • BD BUSY Load Circuits for Bus Relinquish Time DBN 1k 100pF ( Hi-Z ( D11 D0 OGND 5V 1k 100pF LTC1409 • ...
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... DYNAMIC PERFORMANCE The LTC1409 has excellent high speed sampling capabil- ity. FFT (Fast Four Transform) test techniques are used to test the ADC’s frequency response, distortion and noise at the rated throughput. By applying a low distortion sine wave and analyzing the digital output using FFT algorithm, the ADC’ ...
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... ADC and is directly related to the S/( the equation [S/( – 1.76]/6.02 where N is the effective number of bits of resolution and S/( expressed in dB. At the maximum sampling rate of 800kHz the LTC1409 maintains near ideal ENOBs up to the Nyquist input frequency of 400kHz. Refer to Figure ...
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... Nyquist Frequency. The noise floor stays very low at high frequencies; S/( becomes dominated by distortion at frequencies far beyond Nyquist. Driving the Analog Input The differential analog inputs of the LTC1409 are easy to drive. The inputs may be driven differentially single-ended input (i.e., the –A input is grounded). The IN +A and – ...
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... If slower op amps are used, more settling time can be provided by increasing the time between conversions. The best choice for an op amp to drive the LTC1409 will depend on the application. Generally applications fall into two categories: AC applications where dynamic specifi- cations are most critical, and time domain applications where DC accuracy and settling time are most critical ...
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... Figure 7b shows a simple implementation using a LTC1560 5th order elliptic continuous time filter. Input Range The 2.5V input range of the LTC1409 is optimized for low noise and low distortion. Most op amps also perform best over this same range, allowing direct coupling to the analog inputs and eliminating the need for special transla- tion circuitry ...
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... Full-Scale and Offset Adjustment Figure 11a shows the ideal input/output characteristics for the LTC1409. The code transitions occur midway between successive integer LSB values (i.e., –FS + 0.5LSB, –FS + 1.5LSB, –FS + 2.5LSB,. FS – 1.5LSB, FS – 0.5LSB The output is two’ ...
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... BOARD LAYOUT AND BYPASSING Wire wrap boards are not recommended for high resolu- tion or high speed A/D converters. To obtain the best performance from the LTC1409, a printed circuit board with ground plane is required. Layout for the printed circuit board should ensure that digital and analog signal lines are separated as much as possible ...
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... PPLICATI S I FOR ATIO W U LTC1409 15 ...
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... LTC1409 PPLICATI S I FOR ATIO Figure 13b. Suggested Evaluation Circuit Board Component Side Silkscreen Figure 13c. Suggested Evaluation Circuit Board Component Side Layout ...
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... Power Shutdown The LTC1409 provides two power Shutdown modes, Nap and Sleep, to save power during inactive periods. The Nap mode reduces the power by 95% and leaves only the digital logic and reference powered up. The wake-up time ...
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... After the conversion is complete, the processor can LTC1409 • F15 read the new result and initiate another conversion. t CONV DATA (N – 1) DATA N DB11 TO DB0 DB11 TO DB0 ) DATA ( DB11 TO DB0 LTC1409 • F16 ...
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... Figure 19. Slow Memory Mode Timing t t CONV DATA (N – 1) DB11 TO DB0 Figure 20. ROM Mode Timing LTC1409 DATA ( DB11 TO DB0 LTC1409 • F17 LTC1409 • F18 DATA N DATA ( DB11 TO DB0 DB11 TO DB0 LTC1409 • F19 DATA N DB11 TO DB0 LTC1409 • F20 19 ...
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... LTC1409 PACKAGE DESCRIPTIO 0.205 – 0.212** (5.20 – 5.38) 0 – 8 0.005 – 0.009 0.022 – 0.037 (0.13 – 0.22) (0.55 – 0.95) * DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.291 – ...