ADC08D1000EVAL National Semiconductor, ADC08D1000EVAL Datasheet - Page 30

• Manufacturer Part Number: ADC08D1000EVAL
• Description: High Performance/ Low Power/ Dual 8-Bit/ 1 GSPS A/D Converter
• Manufacturer: National Semiconductor

www.national.com
2.0 Applications Information
Pin 3 can be either high or low in the non-extended control
mode. Pin 14 must not be left floating to select this mode.
See Section 1.2 for more information.
Pin 4 can be high or low or can be left floating in the
non-extended control mode. In the non-extended control
mode, pin 4 high or low defines the edge at which the output
data transitions. See Section 2.4.3 for more information. If
this pin is floating, the output clock (DCLK) is a DDR (Double
Data Rate) clock (see Section 1.1.5.3) and the output edge
synchronization is irrelevant since data is clocked out on
both DCLK edges.
Pin 127, if it is high or low in the non-extended control mode,
sets the calibration delay. If pin 127 is floating, the calibration
delay is the same as it would be with this pin low and the
converter performs dual edge sampling (DES).
2.10 COMMON APPLICATION PITFALLS
Driving the inputs (analog or digital) beyond the power
supply rails. For device reliability, no input should not go
more than 150 mV below the ground pins or 150 mV above
the supply pins. Exceeding these limits on even a transient
TABLE 6. Non-Extended Control Mode Operation (Pin
(Continued)
TABLE 7. Extended Control Mode Operation (Pin 14
127
Pin
14
3
4
127
Pin
3
4
CalDly Low
input range
OutEdge =
600 mV
0.44V
Output
Low
Neg
14 High or Low)
SCS (Serial Interface Chip Select)
P-P
P-P
Floating)
SDATA (Serial Data)
SCLK (Serial Clock)
CalDly High
input range
OutEdge =
800 mV
0.6V
Output
Function
High
Pos
P-P
P-P
Extended
Floating
Control
Mode
DDR
DES
n/a
30
basis may not only cause faulty or erratic operation, but may
impair device reliability. It is not uncommon for high speed
digital circuits to exhibit undershoot that goes more than a
volt below ground. Controlling the impedance of high speed
lines and terminating these lines in their characteristic im-
pedance should control overshoot.
Care should be taken not to overdrive the inputs of the
ADC08D1000. Such practice may lead to conversion inac-
curacies and even to device damage.
Incorrect analog input common mode voltage in the d.c.
coupled mode. As discussed in section 1.3 and 3.0, the Input
common mode voltage must remain within 50 mV of the
V
must also be tracked. Distortion performance will be de-
graded if the input common mode voltages more than 50 mV
from V
Using an inadequate amplifier to drive the analog input.
Use care when choosing a high frequency amplifier to drive
the ADC08D1000 as many high speed amplifiers will have
higher distortion than will the ADC08D1000, resulting in
overall system performance degradation.
Driving the V
mentioned in Section 2.1, the reference voltage is intended
to be fixed to provide one of two different full-scale values
(600 mV
change the full scale value, but can otherwise upset opera-
tion.
Driving the clock input with an excessively high level
signal. The ADC input clock level should not exceed the
level described in the Operating Ratings Table or the input
offset could change.
Inadequate input clock levels. As described in Section 2.3,
insufficient input clock levels can result in poor performance.
Excessive input clock levels could result in the introduction
of an input offset.
Using a clock source with excessive jitter, using an
excessively long input clock signal trace, or having
other signals coupled to the input clock signal trace.
This will cause the sampling interval to vary, causing exces-
sive output noise and a reduction in SNR performance.
Failure to provide adequate heat removal. As described in
Section 2.6.2, it is important to provide adequate heat re-
moval to ensure device reliability. This can either be done
with adequate air flow or the use of a simple heat sink built
into the board. The backside pad should be grounded for
best performance.
CMO
output , which has a variability with temperature that
CMO
P-P
.
and 800 mV
BG
pin to change the reference voltage. As
P-P
). Over driving this pin will not