AD679 Analog Devices, AD679 Datasheet - Page 8

• Manufacturer Part Number: AD679
• Description: 14-Bit 128 kSPS Complete Sampling ADC
• Manufacturer: Analog Devices

AD679
CONVERSION CONTROL
In synchronous mode (SYNC = HIGH), both Chip Select (CS)
and Start Convert (SC) must be brought LOW to start a con-
version. CS should be LOW t
asynchronous mode (SYNC = LOW), a conversion is started by
bringing SC low, regardless of the state of CS.
Before a conversion is started, End-of-Convert (EOC) is HIGH
and the sample-hold is in track mode. After a conversion is
started, the sample-hold goes into hold mode and EOC goes
LOW, signifying that a conversion is in progress. During the
conversion, the sample-hold will go back into track mode and
start acquiring the next sample.
In track mode, the sample-hold will settle to 0.003% (14 bits)
in 1.5 s maximum. The acquisition time does not affect the
throughput rate as the AD679 goes back into track mode more
than 2 s before the next conversion. In multichannel systems,
the input channel can be switched as soon as EOC goes LOW.
Bringing OE LOW t
register contents available on the output data bits (DB7–DB0).
A period of time t
fore the next SC instruction is issued.
If SC is held LOW, conversion accuracy may deteriorate. For
this reason, SC should not be held low in an attempt to operate
in a continuously converting mode.
Synchronous
Asynchronous
NOTES
1 = HIGH voltage level.
0 = LOW voltage level.
X = Don’t care.
Unipolar Coding
(Straight Binary)
V
0.00000 V
5.00000 V
9.99939 V
*Code center.
IN
= HIGH to LOW transition. Must stay low for t = t
Mode
Mode
*
14-BIT MODE CODING FORMAT (1 LSB = 0.61 mV)
START CONVERSION TRUTH TABLE
Output Code
000 . . . 0
100 . . . 0
111 . . . 1
SYNC
CD
1
1
1
1
0
0
0
OE
is required after OE is brought HIGH be-
INPUTS
after CS goes LOW makes the output
CS
X
X
X
1
0
f
0
SC
before SC is brought LOW. In
SC
(Twos Complement)
V
+2.50000 V
+4.99939 V
Bipolar Coding
–5.00000 V
–0.00061 V
0.00000 V
X
f
0
0
1
f
0
IN
*
STATUS
No Conversion
Start Conversion
Start Conversion
(Not Recommended)
Continuous Conversion
(Not Recommended)
No Conversion
Start Conversion
Continuous Conversion
(Not Recommended)
CP
.
Output Code
100 . . . 0
111 . . . 1
000 . . . 0
010 . . . 0
011 . . . 1
–8–
END-OF-CONVERT
In asynchronous mode, End-of-Convert (EOC) is an open drain
output (requiring a minimum 3 k pull-up resistor) enabled by
End-of-Convert Enable (EOCEN). In synchronous mode, EOC
is a three-state output which is enabled by EOCEN and CS. See
Conversion Status Truth Table. Access (t
timing specifications do not apply in asynchronous mode where
they are a function of the time constant formed by the external
load capacitance and the pull-up resistor.
OUTPUT ENABLE OPERATION
The data bits (DB7–DB0) are three-state outputs that are en-
abled by Chip Select (CS) and Output Enable (OE). CS should
be LOW t
When EOC goes HIGH, the conversion is completed and the
output data may be read. The output is read in two steps as a
16-bit word, with the high byte read first, followed by the low
byte. High Byte Enable (HBE) controls the output sequence.
The 14-bit result is left justified within the 16-bit field.
In unipolar mode (BIPOFF tied to AGND), the output coding
is straight binary. In bipolar mode (BIPOFF tied to REF
output coding is twos-complement binary.
POWER-UP
The AD679 typically requires 10 s after power-up to reset in-
ternal logic.
Synchronous
Asynchronous
NOTES
1 = HIGH voltage level.
0 = LOW voltage level.
X = Don’t care.
*EOC requires a pull-up resistor in asynchronous mode.
Unipolar or
Bipolar
NOTES
1 = HIGH voltage level.
0 = LOW voltage level.
X = Don’t care.
U = Logical OR.
Data coding is binary for Unipolar Mode and 2s Complement Binary for Bipolar
Mode.
Mode
Mode*
OE
CONVERSION STATUS TRUTH TABLE
before OE is brought LOW.
OUTPUT ENABLE TRUTH TABLE
SYNC CS EOCEN EOC
1
1
1
1
0
0
0
HBE
X
INPUTS
0
1
X
X
X
X
0
0
1
INPUTS
a = MSB.
n = LSB.
(CS U OE)
1
0
0
X
0
0
1
0
0
1
OUTPUT
0
1
High Z
High Z
0
High Z
High Z
a b c d e f g h
BA
i j k l m n 0 0
) and float (t
DB7 . . . DB0
STATUS
Converting
Not Converting
Either
Either
Converting
Not Converting
Either
OUTPUTS
High Z
FD
OUT
REV. C
)
),