CAT5241JI-00 Catalyst Semiconductor, CAT5241JI-00 Datasheet - Page 7

• Manufacturer Part Number: CAT5241JI-00
• Description: Quad Digitally Programmable Potentiometers (DPP) with 64 Taps and 2-wire Interface
• Manufacturer: Catalyst Semiconductor

In the Write mode, the Master device sends the START
condition and the slave address information to the Slave
device. After the Slave generates an acknowledge, the
Master sends the instruction byte that defines the
requested operation of CAT5241. The instruction byte
consist of a four-bit opcode followed by two register
selection bits and two pot selection bits. After receiving
another acknowledge from the Slave, the Master device
transmits the data to be written into the selected register.
The CAT5241 acknowledges once more and the Master
generates the STOP condition, at which time if a non-
volatile data register is being selected, the device begins
an internal programming cycle to non-volatile memory.
While this internal cycle is in progress, the device will not
respond to any request from the Master device.
*
**
A0, A1, A2 and A3 correspond to pin A0, A1, A2 and A3 of the device.
A0, A1, A2 and A3 must compare to its corresponding hard wired input pins.
BUS ACTIVITY:
SDA LINE
MASTER
CAT5241
R
S
T
A
T
S
0
Fixed
SLAVE/DPP
ADDRESS
1
Variable
0
C
A
K
1
op code
INSTRUCTION
7
A3
BYTE
The disabling of the inputs can be used to take advantage
of the typical write cycle time. Once the stop condition is
issued to indicate the end of the host's write operation,
the CAT5241 initiates the internal write cycle. ACK
polling can be initiated immediately. This involves issuing
the start condition followed by the slave address. If the
CAT5241 is still busy with the write operation, no ACK
will be returned. If the CAT5241 has completed the write
operation, an ACK will be returned and the host can then
proceed with the next instruction operation.
Pot/WCR
Address
A2
Data Register
Address
A1
C
A
K
A0
DR WCR DATA
A
C
K
P
S
O
P
T
Document No. 2011, Rev. J