MC145202D MOTOROLA [Motorola, Inc], MC145202D Datasheet

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MC145202D

Manufacturer Part Number
MC145202D
Description
Low-Voltage 2.0 GHz PLL Frequency Synthesizer Includes On-Board 64/65 Prescaler
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC145202D.pdf (24 pages)
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage 2.0 GHz
PLL Frequency Synthesizer
Includes On–Board 64/65 Prescaler
interface capable of direct usage up to 2.0 GHz.
compatible. The serial port is byte-oriented to facilitate control via an MCU. Due
to the innovative BitGrabber Plus registers, the MC145202 may be cascaded
with other peripherals featuring BitGrabber Plus without requiring leading
dummy bits or address bits in the serial data stream. In addition, BitGrabber
Plus peripherals may be cascaded with existing BitGrabber
output and a double–ended phase detector B output. Both phase detectors
have linear transfer functions (no dead zones). The maximum current of the
single–ended phase detector output is determined by an external resistor tied
from the Rx pin to ground. This current can be varied via the serial port.
This minimizes interference caused by REF out .
single–ended mode. Also featured are on–board support of an external crystal
and a programmable reference output. The R, A, and N counters are fully
programmable. The C register (configuration register) allows the part to be
configured to meet various applications. A patented feature allows the C
register to shut off unused outputs, thereby minimizing system noise and
interference.
loaded into the counters, on–board circuitry synchronizes the update of the A
register if the A or N counters are loading. Similarly, an update of the R register
is synchronized if the R counter is loading.
the three counters (R, A, and N) simultaneously.
BitGrabber and BitGrabber Plus are trademarks of Motorola, Inc.
REV 3
1/98
MOTOROLA
The MC145202 is a low–voltage single–package synthesizer with serial
The counters are programmed via a synchronous serial port which is SPI
The device features a single–ended current source/sink phase detector A
Slew–rate control is provided by a special driver designed for the REF out pin.
This part includes a differential RF input that may be operated in a
In order to have consistent lock times and prevent erroneous data from being
The double–buffered R register allows new divide ratios to be presented to
Motorola, Inc. 1998
Maximum Operating Frequency: 2000 MHz @ – 10 dBm
Operating Supply Current: 4 mA Nominal at 3.0 V
Operating Supply Voltage Range (V DD and V CC Pins): 2.7 to 5.5 V
Operating Supply Voltage Range of Phase Detectors (V PD Pin): 2.7 to 5.5 V
Current Source/Sink Phase Detector Output Capability: 1.7 mA @ 5.0 V
Gain of Current Source/Sink Phase/Frequency Detector Controllable via
Serial Port
Operating Temperature Range: – 40 to + 85 C
R Counter Division Range: 1 and 5 to 8191
Dual–Modulus Capability Provides Total Division up to 262,143
High–Speed Serial Interface: 4 Mbps
OUTPUT A Pin, When Configured as Data Out, Permits Cascading of Devices
Two General–Purpose Digital Outputs — OUTPUT A: Totem–Pole (Push–Pull)
Patented Power–Saving Standby Feature with Orderly Recovery for
Minimizing Lock Times, Standby Current: 30 A
Evaluation Kit Available (Part Number MC145202EVK)
See Application Note AN1253/D for Low–Pass Filter Design, and
AN1277/D for Offset Reference PLLs for Fine Resolution or Fast Hopping
TN98012300
OUTPUT B: Open–Drain
with Four Output Modes
1.0 mA @ 3.0 V
peripherals.
20
20
TEST 1
REF out
ORDERING INFORMATION
MC145202F
MC145202DT
PD out
MC145202
GND
V PD
Rx
LD
f in
1
V
R
PIN ASSIGNMENT
1
1
2
3
4
5
6
7
8
9
10
SOG Package
TSSOP
Order this document
11
20
19
18
17
16
15
14
13
12
SOG PACKAGE
CASE 948D
CASE 751J
DT SUFFIX
F SUFFIX
by MC145202/D
TSSOP
REF in
D in
CLK
ENB
OUTPUT A
OUTPUT B
V DD
TEST 2
V CC
f in
MC145202
1

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MC145202D Summary of contents

Page 1

... Four Output Modes OUTPUT B: Open–Drain Order this document by MC145202/D MC145202 F SUFFIX SOG PACKAGE 20 CASE 751J 1 DT SUFFIX TSSOP 20 CASE 948D 1 ORDERING INFORMATION MC145202F SOG Package MC145202DT TSSOP PIN ASSIGNMENT REF out 1 20 REF CLK ...

Page 2

REF in OSC OR 4–STAGE DIVIDER 1 (CONFIGURABLE) REF out 3 18 CLK SHIFT REGISTER 19 AND D in CONTROL 24 LOGIC 17 ENB INTERNAL CONTROL INPUT 10 AMP f in SUPPLY CONNECTIONS: PIN 12 ...

Page 3

MAXIMUM RATINGS* (Voltages Referenced to GND, unless otherwise stated) Symbol Parameter Supply Voltage (Pins 12 and 14 Supply Voltage (Pin Input Voltage V out DC Output Voltage ...

Page 4

ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter I in Maximum Input Leakage Current ( CLK, ENB, REF Maximum Input Current (REF Maximum Output Leakage Current (PD out ) (OUTPUT B) I STBY ...

Page 5

AC INTERFACE CHARACTERISTICS ( 2 – pF, Input ns 2.7 ...

Page 6

CLK 50% 10 1/f clk t PLH t PHL 90% OUTPUT A 50% (DATA OUT) 10% t TLH t THL Figure 1. VALID 50 50% ...

Page 7

LOOP SPECIFICATIONS ( 2.7 to 5.5 V unless otherwise indicated – Symbol b l Parameter Input Sensitivity Range ref Input ...

Page 8

SOG PACKAGE 4 4 Figure 13. Normalized Input Impedance — Series Format (R + jx) Table 1. Input Impedence — Series Format ( ...

Page 9

PIN DESCRIPTIONS DIGITAL INTERFACE PINS D in Serial Data Input (Pin 19) The bit stream begins with the most significant bit (MSB) and is shifted in on the low–to–high transition of CLK. The bit pattern is 1 byte (8 bits) ...

Page 10

OUTPUT A Configurable Digital Output (Pin 16) OUTPUT A is selectable Data Out, or Port. Bits A22 and A23 in the A register control the selection; see Figure 15. If A23 = A22 ...

Page 11

PD out Single–Ended Phase/Frequency Detector Output (Pin 6) This is a three–state current–source/sink output for use as a loop error signal when combined with an external low–pass filter. The phase/frequency detector is characterized by a lin- ear transfer function. The ...

Page 12

TEST POINT PINS TEST 1 Modulus Control Signal (Pin 9) This pin may be used in conjunction with the Test 2 pin for access to the on–board 64/65 prescaler. When Test 1 is low, the prescaler divides by 65. When ...

Page 13

ENB 1 CLK MSB this point, the new byte is transferred to the C register and stored. No other registers are affected. C7 – POL: Selects the output polarity of the phase/frequency detectors. When set ...

Page 14

Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç ...

Page 15

ENB CLK MSB R15 R14 R13 R12 R11 CRYSTAL MODE, SHUT DOWN 1 CRYSTAL MODE, ACTIVE 2 REFERENCE MODE, REF in ENABLED and REF out STATIC LOW 3 REFERENCE MODE, REF out ...

Page 16

R REFERENCE REF FEEDBACK out High voltage level Low voltage level *At this point, when both f R ...

Page 17

DESIGN CONSIDERATIONS CRYSTAL OSCILLATOR CONSIDERATIONS The following options may be considered to provide a ref- erence frequency to Motorola’s CMOS frequency synthe- sizers. Use of a Hybrid Crystal Oscillator Commercially available temperature–compensated crystal oscillators (TCXOs) or crystal–controlled data clock oscilla- ...

Page 18

RECOMMENDED READING Technical Note TN–24, Statek Corp. Technical Note TN–7, Statek Corp. E. Hafner, “The Piezoelectric Crystal Unit–Definitions and Method of Measurement”, Proc. IEEE, Vol. 57, No. 2, Feb. 1969. D. Kemper, L. Rosine, “Quartz Crystals for Frequency Table 6. ...

Page 19

PHASE–LOCKED LOOP — LOW–PASS FILTER DESIGN (A) PD out VCO R C NOTE: For (A), using K in amps per radian with the filter’s impedance transfer function, Z(s), maintains units of volts per radian for the detector/filter combination. Additional sideband ...

Page 20

THRESHOLD DETECTOR INTEGRATOR LOW–PASS FILTER NOTES: 1. When used, the R and V outputs are fed to an external combiner/loop filter. See the Phase– Locked Loop — Low–Pass Filter Design page for additional information. 2. Transistor Q1 is required only ...

Page 21

* Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç ...

Page 22

Figure 25. Accessing the R Registers of Two Cascaded MC145202 22 Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç ...

Page 23

SOG (SMALL OUTLINE GULL–WING) PACKAGE –A – 0.13 (0.005 0.13 (0.005 TSSOP (THIN SHRUNK SMALL OUTLINE PACKAGE ...

Page 24

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of ...

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