AD7357_08 AD [Analog Devices], AD7357_08 Datasheet - Page 5

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AD7357_08

Manufacturer Part Number
AD7357_08
Description
Differential Input, Dual, Simultaneous Sampling, 4.2 MSPS, 14-Bit, SAR ADC
Manufacturer
AD [Analog Devices]
Datasheet
Preliminary Technical Data
TIMING SPECIFICATIONS
V
Table 3.
Parameter
f
t
t
t
t
t
t
t
t
t
t
t
Latency
1
2
3
SCLK
CONVERT
QUIET
2
3
4
5
6
7
8
9
10
Temperature ranges are as follows: Y grade: −40°C to +125°C, B grade: −40°C to +85°C.
Specified with a load capacitance of 10 pF on SDATA
The time required for the output to cross 0.4 V or 2.4 V.
2
2
2
DD
, 3
2
= 2.5 V ± 10%, V
Limit at T
50
80
t
5
5
6
12.5
11
9.5
9
5
5
3.5
9.5
5
4.5
9.5
2
+ 15 × t
DRIVE
SCLK
= 2.25 V to 3.6 V, internal reference = 2.048 V, T
MIN
1 conversion latency
, T
MAX
Unit
kHz min
MHz max
ns max
ns min
ns min
ns max
ns max
ns max
ns max
ns max
ns min
ns min
ns min
ns max
ns min
ns min
ns max
A
and SDATA
B
.
Rev. PrF | Page 5 of 20
Description
t
Minimum time between end of serial read and next falling edge of CS
CS to SCLK setup time
Delay from CS until SDATA
Data access time after SCLK falling edge
1.8 V ≤ V
2.25 V ≤ V
2.75 V ≤ V
3.3 V ≤ V
SCLK low pulse width
SCLK high pulse width
SCLK to data valid hold time
CS rising edge to SDATA
CS rising edge to falling edge pulse width
SCLK falling edge to SDATA
SCLK falling edge to SDATA
SCLK
= 1/f
SCLK
DRIVE
DRIVE
DRIVE
DRIVE
A
< 2.25 V
≤ 3.6 V
= T
< 2.75 V
< 3.3 V
MAX
to T
A
, SDATA
MIN
A
A
A
and SDATA
, SDATA
, SDATA
1
, unless otherwise noted.
B
, high impedance
B
B
, high impedance
, high impedance
B
are three-state disabled
AD7357

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