VSP2260Y/2KC BURR-BROWN [Burr-Brown Corporation], VSP2260Y/2KC Datasheet - Page 4

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VSP2260Y/2KC

Manufacturer Part Number
VSP2260Y/2KC
Description
CCD SIGNAL PROCESSOR for DIGITAL CAMERAS
Manufacturer
BURR-BROWN [Burr-Brown Corporation]
Datasheet
PIN CONFIGURATION
PIN DESCRIPTIONS
NOTES: (1) Type designators: P = Power Supply and Ground; DI = Digital Input; DO = Digital Output; AI = Analog Input; AO = Analog Output. (2) Should be
connected to ground with a bypass capacitor. We recommend the value of 0.1 F to 0.22 F, however, it depends on the application environment. Refer to the “Optical
Black Level Clamp Loop” section for more detail. (3) Should be connected to ground with a bypass capacitor. We recommend the value of 400pF to 9000pF, however,
it depends on the application environment. Refer to the “Voltage Reference” section for more detail. (4) Should be connected to ground with a bypass capacitor
(0.1 F). Refer to the “Voltage Reference” section for more detail. (5) Refer to “Serial Interface” section for more detail.
4
PIN
Top View
10
11
12
13
14 DRVGND
15
16
17
18
19
20
21
22
23
1
2
3
4
5
6
7
8
9
B0 (LSB)
B9 (MSB)
ADCCK
CLPDM
CLPOB
DRV
NAME TYPE
GNDA
GNDA
PBLK
SHD
SHP
V
NC
NC
B1
B2
B3
B4
B5
B6
B7
B8
CC
DD
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DI
DI
DI
DI
DI
DI
P
P
P
P
P
(1)
DESCRIPTION
Should be Left OPEN
Should be Left OPEN
Bit 0 (LSB), A/D Converter Output
Bit 1, A/D Converter Output
Bit 2, A/D Converter Output
Bit 3, A/D Converter Output
Bit 4, A/D Converter Output
Bit 5, A/D Converter Output
Bit 6, A/D Converter Output
Bit 7, A/D Converter Output
Bit 8, A/D Converter Output
Bit 9 (MSB), A/D Converter Output
Power Supply, Exclusively for Digital Output
Digital Ground, Exclusively for Digital Output
Analog Ground
Clock for Digital Output Buffer
Analog Ground
Analog Power Supply
Preblanking:
Optical Black Clamp Pulse (Default = Active LOW)
CDS Reference Level Sampling Pulse (Default = Active LOW)
CDS Data Level Sampling Pulse (Default = Active LOW)
Dummy Pixel Clamp Pulse (Default = Active LOW)
HIGH = Normal Operation Mode
LOW = Preblanking Mode: Digital Output “All Zero”
SLOAD
RESET
SDATA
GNDA
GNDA
REFN
REFP
SCLK
V
CM
NC
NC
CC
37
38
39
40
41
42
43
44
45
46
47
48
36
1
35
2
34
3
33
4
32
5
VSP2260
(5)
(5)
31
6
(5)
(5)
30
7
PIN
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
29
8
RESET
SLOAD
SDATA
BYPP2
CCDIN
NAME TYPE
GNDA
GNDA
GNDA
GNDA
GNDA
BYPM
GNDA
REFP
REFN
SCLK
COB
BYP
CM
V
V
V
V
V
NC
NC
28
CC
CC
CC
CC
CC
9
27
10
AO
AO
AO
AO
AO
AO
AO
AI
DI
DI
DI
DI
P
P
P
P
P
P
P
P
P
P
P
26
11
(1)
Analog Power Supply
Analog Ground
Analog Ground
Analog Power Supply
Optical Black Clamp Loop Reference
Internal Reference P
CCD Signal Input
Internal Reference C
Internal Reference N
Analog Power Supply
Analog Power Supply
Analog Ground
Analog Ground
A/D Converter Common-Mode Voltage
A/D Converter Positive Reference
A/D Converter Negative Reference
Analog Power Supply
Analog Ground
Analog Ground
Should be Left OPEN
Should be Left OPEN
Asynchronous System Reset (Active LOW)
Serial Data Latch Signal (Triggered at the Rising Edge)
Serial Data Input
Clock for Serial Data Shift (Triggered at the Rising Edge)
DESCRIPTION
25
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CLPDM
SHD
SHP
CLPOB
PBLK
V
GNDA
ADCCK
GNDA
DRVGND
DRV
CC
CC
DD
(3)
(4)
(3)
(4)
(4)
(2)
(4)
VSP2260
SBMS010
LQFP

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