AD9058KD AD [Analog Devices], AD9058KD Datasheet - Page 3

• Manufacturer Part Number: AD9058KD
• Description: Dual 8-Bit 50 MSPS A/D Converter
• Manufacturer: AD [Analog Devices]

EXPLANATION OF TEST LEVELS
Test Level
I
II – 100% production tested at +25°C, and sample tested at
III – Sample tested only.
IV – Parameter is guaranteed by design and characterization
V – Parameter is a typical value only.
VI – All devices are 100% production tested at +25°C. 100%
Parameter (Conditions)
DYNAMIC PERFORMANCE
DIGITAL OUTPUTS
POWER SUPPLY
NOTES
1
2
3
4
5
6
7
Specifications subject to change without notice.
Absolute maximum ratings are limiting values to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability is
not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device reliability.
For applications in which +V
ground and –V
Typical thermal impedances: 44-lead hermetic J-Leaded ceramic package: θ
θ
To achieve guaranteed conversion rate, connect each data output to ground through a 2 k Ω pull-down resistor.
SNR performance limits for the 48-lead DIP “D” package are 1 dB less than shown. ENOB limits are degraded by 0.3 dB. SNR and ENOB measured with
analog input signal 1 dB below full scale at specified frequency.
Crosstalk rejection measured with full-scale signals of different frequencies (2.3 MHz and 3.5 MHz) applied to each channel. With both signals synchronously
encoded at 40 MSPS, isolation of the undesired frequency is measured with an FFT.
Applies to both A/Ss and includes internal ladder dissipation.
JC
Transient Response
Overvoltage Recovery Time
Effective Number of Bits (ENOB)
Signal-to-Noise Ratio
Signal-to-Noise Ratio
2nd Harmonic Distortion
3rd Harmonic Distortion
Crosstalk Rejection
Logic “1” Voltage (I
Logic “0” Voltage (I
+V
–V
Power Dissipation
= 12°C/W.
– 100% production tested.
Analog Input @ 2.3 MHz
Analog Input @ 2.3 MHz
Analog Input @ 2.3 MHz
Analog Input @ 2.3 MHz
Analog Input @ 2.3 MHz
S
S
specified temperatures.
testing.
production tested at temperature extremes for extended
temperature devices; sample tested at temperature
extremes for commercial/industrial devices.
Supply Current
Supply Current
S
to prevent destructive latch up. See section entitled “Using the AD9058.”
@ 10.3 MHz
@ 10.3 MHz
@ 10.3 MHz
@ 10.3 MHz
@ 10.3 MHz
7
6
OH
OL
5
5
S
(Without Harmonics)
= 2 mA)
= 2 mA)
may be applied before –V
5
S
, or +V
Temp
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
Full
Full
Full
Full
Full
S
current is not limited to 500 mA, a reverse biased clamping diode should be inserted between
Test
Level
V
V
I
I
I
I
I
I
I
I
I
I
IV
VI
VI
VI
VI
VI
JA
Model
AD9058JJ
AD9058KJ
AD9058TJ/883
AD9058JD
AD9058KD
AD9058TD/883
NOTES
1
2
3
D = Hermetic Ceramic DIP Package; J = Leaded Ceramic Package.
Hermetically sealed ceramic package; footprint equivalent to PLCC.
For specifications, refer to Analog Devices Military Products Databook.
Min
2.4
= 86.4°C/W; θ
AD9058JD/JJ
Typ
2
2
7.7
7.4
48
46
48
47
58
58
58
58
60
127
27
770
3
JC
3
Temperature
Range
0°C to +70°C
0°C to +70°C
–55°C to +125°C 44-Lead J-Leaded
0°C to +70°C
0°C to +70°C
–55°C to +125°C 48-Lead Ceramic
= 24.9°C/W; 48-lead hermetic DIP θ
Max
0.4
38
154
960
ORDERING GUIDE
Min
7.2
7.1
45
44
46
45
48
48
50
50
48
2.4
AD9058KD/KJ
Description
44-Lead J-Leaded
Ceramic
44-Lead J-Leaded
Ceramic, AC Tested
Ceramic, AC Tested
48-Lead Ceramic DIP D-48
48-Lead Ceramic
DIP, AC Tested
DIP, AC Tested
Typ
2
2
7.7
7.4
48
46
48
47
58
58
58
58
60
127
27
770
2
Max
0.4
154
38
960
JA
Unit
ns
ns
Bits
Bits
dB
dB
dB
dB
dBc
dBc
dBc
dBc
dBc
V
V
mA
mA
mW
AD9058
= 40°C/W;
Package
Option
D-48
D-48
J-44
J-44
J-44
1