AD5062BRJ-1 AD [Analog Devices], AD5062BRJ-1 Datasheet

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AD5062BRJ-1

Manufacturer Part Number
AD5062BRJ-1
Description
Full Accurate 16 Bit Vout nanoDac, 2.7V- 5.5V, in a Sot 23
Manufacturer
AD [Analog Devices]
Datasheet
Preliminary Technical Data
FEATURES
APPLICATIONS
GENERAL DESCRIPTION
The AD5062/AD5063, a member of the nanoDAC
are single 16-bit unbuffered voltage out DACs that operate
from a single 2.7-5V supply. The AD5062 version is available
in a 8 ld Sot23. The AD5063 version is available with on board
resistors in a 10 ld uSOIC, making it easy to generate bipolar
signals on the output.
The parts utilize a versatile three-wire serial interface that
operates at clock rates up to 30 MHz and is compatible with
standard SPI™, QSPI™, MICROWIRE™ and DSP interface
standards.
The reference for AD5062/AD5063 is supplied from an
external REF pin. A reference buffer is also provided on chip.
The part incorporates a power-on-reset circuit that ensures that
the DAC output powers up to zero volts/ mid scale and remains
there until a valid write takes place to the device. The part
contains a power-down feature that reduces the current
consumption of the device to 50nA at 5 V and provides
software selectable output loads while in power-down mode.
The part is put into power-down mode over the serial interface.
Total unadjusted error for the part is <1mV.
These parts also provide a very low glitch on power-up.
Rev. PrB
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Single 16-Bit DAC, 1Lsb inl.
1.8 Volt Digital Interface Capability
Power-On-Reset to Zero Volts/Mid Scale
Three Power-Down Functions
Low Power Serial Interface with Schmitt-
Triggered Inputs
8-Lead Sot23, 10-Lead MSOP Package
Low Power
Fast Settling 3us.
2.7-5.5 V Power Supply
Low Glitch on Powerup.
Unbuffered Voltage Capable of driving
60k Ohm load.
Process Control
Data Acquisition Systems
Portable Battery Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
TM
Full Accurate 16 Bit Vout nanoDac
family,
Rev. Pr B | Page 1 of 17
Part Number
AD5061
AD5040/60
PRODUCT HIGHLIGHTS
1. Available in 8-lead SOT23, 10-lead MSOP.
2. 16 Bit Accurate, 1 LSB INL.
3. Low Glitch on Power-up.
4. High speed serial interface with clock speeds up to 30 MHz.
5. Three power down modes available to the user.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
2.7V- 5.5V, in a Sot 23
AD5063. 10 Ld MSOP.
Description
2.7 V to 5.5 V, 16 Bit
Sot 23
2.7 V to 5.5 V, 14/16 Bit
INL, Sot23.
AD5062 8 Ld Sot23.
© 2004 Analog Devices, Inc. All rights reserved.
AD5062/AD5063
DAC
DAC
www.analog.com
TM
D/A, 4 LSBs INL,
TM
D/A, 1 LSBs
TM
,

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AD5062BRJ-1 Summary of contents

Page 1

Preliminary Technical Data FEATURES Single 16-Bit DAC, 1Lsb inl. 1.8 Volt Digital Interface Capability Power-On-Reset to Zero Volts/Mid Scale Three Power-Down Functions Low Power Serial Interface with Schmitt- Triggered Inputs 8-Lead Sot23, 10-Lead MSOP Package Low Power Fast Settling 3us. ...

Page 2

AD5062/AD5063 AD5062/AD5063—SPECIFICATIONS (V = 2.7-5.5 V, Vref =4.096V @ MIN Parameter Min STATIC PERFORMANCE AD5062/AD5063 Resolution 16 Relative Accuracy TUE Differential Nonlinearity Offset Zero Code Error Gain Error Offset Drift Gain Temperature Coefficient ...

Page 3

Preliminary Technical Data Parameter Min PSSR NOTES 1 Temperature ranges are as follows: B Version: –40°C to +125°C, typical at 25°C. 2 Guaranteed by design and characterization, not production tested. Specifications subject to change without notice Version Unit ...

Page 4

AD5062/AD5063 TIMING CHARACTERISTICS ( 2.7-5.5 V; all specifications T MIN to T MAX unless otherwise noted) 1 Parameter Limit 4.5 6 ...

Page 5

... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. This device is a high performance RF integrated circuit with an ESD rating of <2 kV, and it is ESD sensitive. Proper precautions should be taken for handling and assembly. Model Temperature Range O AD5062BRJ-1 - 125 O AD5062BRJ-2 - 125 ...

Page 6

AD5062/AD5063 PIN CONFIGURATION AND FUNCTION DESCRIPTION Figure 3. AD5063 10 ld uSOIC. Table 2. Pin Function Descriptions Mnemonic Function V Power Supply Input. These parts can be operated from +2 +5.5 V and V DD REF Reference Voltage ...

Page 7

Preliminary Technical Data TERMINOLOGY Relative Accuracy For the DAC, relative accuracy or Integral Nonlinearity (INL measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. A typical INL ...

Page 8

AD5062/AD5063 INL Linearity Plot 1 0.6 0.2 -0.2 -0.6 -1 DAC Code Figure 4. Typical INL Plot Figure 5. Zero Scale Error and Full Scale Error vs. Temperature Preliminary Technical Data DNL Linearity Plot 1 0.6 0.2 -0.2 -0.6 -1 ...

Page 9

Preliminary Technical Data Figure 9. Supply Current vs. Temperature Figure 10. Full Scale Settling Time Figure 11. Supply Current vs Code. Figure 12. Supply Current vs SupplyoVoltage Figure 13. Half Scale Settling Time Figure 14. Power on Reset to 0 ...

Page 10

AD5062/AD5063 Figure 15. Digital to Analog Glitch Impulse Figure 16. Output Spectral Density 100k Bandwidth Figure 17. Exiting Power-Down Preliminary Technical Data Figure 18. Harmonic Distortion on digitally Generated Waveform. Figure 19. 0 Noise Plot Figure ...

Page 11

Preliminary Technical Data Figure 21. Glitch Energy Figure 22. Offset Error Distribution Figure 23. Gain Error Distribution Rev Page AD5062/AD5063 ...

Page 12

AD5062/AD5063 GENERAL DESCRIPTION The AD5062/AD5063 are single 16-bit, serial input, voltage output DACs. It operates from supply voltages of 2.7-5.5 V. Data is written to the AD5062/ 24-bit word format, via a 3- wire serial interface The AD5062/AD5063 ...

Page 13

Preliminary Technical Data SYNC Interrupt In a normal write sequence, the SYNC line is kept low for at least 24 falling edges of SCLK and the DAC is updated on the 24th falling edge. However, if SYNC is brought high ...

Page 14

AD5062/AD5063 SCLK SYNC DIN DB23 INVALID WRITE SEQUENCE: TH SYNC HIGH BEFORE 24 FALLING EDGE AD5062/AD5063 to 68HC11/68L11 Interface Figure 26 shows a serial interface between the AD5060 and the 68HC11/68L11 microcontroller. SCK of the 68HC11/68L11 drives the SCLK of ...

Page 15

Preliminary Technical Data reference. The AD5062/AD5063 have just one reference input, REFIN. The voltage on the reference input is used to supply the positive input to the Dac . Therefore any error in the reference will be reflected in the ...

Page 16

AD5062/AD5063 Figure 31. The power supply to the part also needs to be isolated. This is done by using a transformer. On the DAC side of the transformer regulator provides the +5 V supply required for the ...

Page 17

Preliminary Technical Data © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owner. PR04766-0-9/04 ( PrB). Outline Dimensions Dimensions shown in inches and mms 8 ld SOT23 10 ld uSOIC Rev. ...

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