DSP56800FMD MOTOROLA [Motorola, Inc], DSP56800FMD Datasheet
DSP56800FMD
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DSP56800FMD Summary of contents
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Semiconductor Products Sector Preliminary Technical Data DSP56F826 16-bit Digital Signal Processor • MIPS at 80MHz core frequency • DSP and MCU functionality in a unified, C-efficient architecture • Hardware DO and REP loops • MCU-friendly instruction set ...
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Part 1 Overview 1.1 DSP56F826 Features 1.1.1 Digital Signal Processing Core • Efficient 16-bit DSP56800 Family DSP engine with dual Harvard architecture • As many as 40 Million Instructions Per Second (MIPS) at 80MHz core frequency • Single-cycle 16 16-bit ...
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Sixteen (16) dedicated general purpose I/O (GPIO) pins • Thirty (30) shared general purpose I/O (GPIO) pins • Computer-Operating Properly (COP) Watchdog timer • Two external interrupt pins • External reset pin for hardware reset • JTAG/On-Chip Emulation (OnCE™) ...
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Best in Class Development Environment The SDK (Software Development Kit) provides fully debugged peripheral drivers, libraries and interfaces that allow programmers to create their unique C application code independent of component architecture. The CodeWarrior Integrated Development Environment is a ...
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Part 2 Signal/Connection Descriptions 2.1 Introduction The input and output signals of the DSP56F826 are organized into functional groups, as shown in and as illustrated in Figure 2. In Table 2. Functional Group Pin Allocations Power ( ...
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Power Port Ground Port DDIO 3.3V Power Port 4 V Ground Port SSIO V Analog Power Port (3.3V) DDA Ground Port V SSA ) EXTAL(CLOCKIN PLL and Clock XTAL CLKO External ...
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Table 3. DSP56F826 Signal and Package Information for the 100 Pin LQFP All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always enabled. Exceptions: 1. When owned by GPIO, then the ...
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Table 3. DSP56F826 Signal and Package Information for the 100 Pin LQFP All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always enabled. Exceptions: 1. When owned by GPIO, then the ...
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Table 3. DSP56F826 Signal and Package Information for the 100 Pin LQFP All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always enabled. Exceptions: 1. When owned by GPIO, then the ...
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Table 3. DSP56F826 Signal and Package Information for the 100 Pin LQFP All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always enabled. Exceptions: 1. When owned by GPIO, then the ...
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Table 3. DSP56F826 Signal and Package Information for the 100 Pin LQFP All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always enabled. Exceptions: 1. When owned by GPIO, then the ...
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Table 3. DSP56F826 Signal and Package Information for the 100 Pin LQFP All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always enabled. Exceptions: 1. When owned by GPIO, then the ...
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Table 3. DSP56F826 Signal and Package Information for the 100 Pin LQFP All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always enabled. Exceptions: 1. When owned by GPIO, then the ...
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Table 3. DSP56F826 Signal and Package Information for the 100 Pin LQFP All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always enabled. Exceptions: 1. When owned by GPIO, then the ...
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Table 3. DSP56F826 Signal and Package Information for the 100 Pin LQFP All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always enabled. Exceptions: 1. When owned by GPIO, then the ...
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Part 3 Specifications 3.1 General Characteristics The DSP56F826 is fabricated in high-density CMOS with 5-volt tolerant TTL-compatible digital inputs. The term 5-volt tolerant refers to the capability of an I/O pin, built on a 3.3V compatible process technology, to withstand ...
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Table 5. Recommended Operating Conditions Characteristic Supply voltage, core Supply Voltage, IO and analog Ambient operating temperature Flash program/erase temperature Table 6. Thermal Characteristics Characteristic Thermal resistance junction-to-ambient (estimated) I/O pin power dissipation Power dissipation Maximum allowed ...
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Table 7. DC Electrical Characteristics (Continued) Operating Conditions SSIO SS SSA Characteristic Output tri-state current high Output High Voltage with IOH load Output Low Voltage with IOL load Output High Current Output Low Current Input capacitance ...
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AC Electrical Characteristics Timing waveforms in Section 3.3 all pins except XTAL, which is tested using the input levels in V for an input signal are shown Input Signal Midpoint1 Fall Time Note: The midpoint is V ...
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Flash Memory Characteristics Table 8. Flash Memory Truth Table 1 Mode XE Standby L Read H Word Program H Page Erase H Mass Erase address enable, all rows are disabled when ...
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Table 10. Timing Symbols Characteristic X address access time Y address access time OE access time PROG/ERASE to NVSTR set up time NVSTR hold time NVSTR hold time(mass erase) NVSTR to program set up time Program hold time Address/data set ...
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Table 11. Flash Timing Parameters Operating Conditions SSIO SS SSA Characteristic 1 Program time 2 Erase time 3 Mass erase time 4 Endurance Data Retention The following parameters should only be used in the Manual Word ...
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IFREN XADR XE YADR YE DIN PROG Tnvs NVSTR Tpgs Figure 5. Flash Program Cycle IFREN XADR XE YE=SE=OE=MAS1=0 ERASE Tnvs NVSTR DSP56F826 Preliminary Technical Data Tadh Tads Tprog Thv Terase Figure 6. Flash Erase Cycle Flash Memory Characteristics Tpgh ...
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IFREN XADR XE MAS1 YE=SE=OE=0 ERASE Tnvs NVSTR Figure 7. Flash Mass Erase Cycle 3.5 External Clock Operation The DSP56F826 system clock can be derived from a crystal or an external system clock signal. To generate a reference frequency using ...
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EXTAL XTAL Figure 8. External Crystal Oscillator Circuit 3.5.2 External Clock Source The recommended method of connecting an external clock is given in is connected to XTAL and the EXTAL pin is grounded. Figure 9. Connecting an External Clock Signal ...
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Table 12. External Clock Operation Timing Requirements Operating Conditions SSIO SS SSA Characteristic Frequency of operation (external clock driver Clock Pulse Width 3, 5 External clock input rise time 4, 5 External clock input ...
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External Bus Asynchronous Timing Table 14. External Bus Asynchronous Timing Operating Conditions SSIO SS SSA Characteristic Address Valid to WR Asserted WR Width Asserted Wait states = 0 Wait states > Asserted to ...
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Timing is both wait state and frequency dependent. In the formulas listed the number of wait states and T = Clock Period. For 80MHz operation 12.5ns. 2. Parameters listed are guaranteed by design. To calculate ...
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Reset, Stop, Wait, Mode Select, and Interrupt Timing Table 15. Reset, Stop, Wait, Mode Select, and Interrupt Timing Operating Conditions SSIO SS SSA Characteristic RESET Assertion to Address, Data and Control Signals High Impedance Minimum ...
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RESET t RAZ A0–A15, D0–D15 PS, DS, RD, WR Figure 13. Asynchronous Reset Timing IRQA, IRQB Figure 14. External Interrupt Timing (Negative-Edge-Sensitive) A0–A15, PS, DS, RD IDM IRQA, IRQB General Purpose I/O Pin t IG IRQA, IRQB Figure ...
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IRQA, IRQB A0–A15, PS, DS, RD, WR Figure 16. Interrupt from Wait State Timing t IW IRQA A0–A15, PS, DS, RD, WR Figure 17. Recovery from Stop State Using Asynchronous Interrupt Timing IRQA A0–A15 PS, DS, RD, WR Figure 18. ...
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Serial Peripheral Interface (SPI) Timing Operating Conditions SSIO SS SSA Characteristic Cycle time Master Slave Enable lead time Master Slave Enable lag time Master Slave Clock (SCLK) high time Master Slave Clock (SCLK) low time ...
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SS (Input) SCLK (CPOL = 0) (Output) SCLK (CPOL = 1) (Output MISO (Input) MOSI (Output) Figure 19. SPI Master Timing (CPHA = 0) SS (Input) SCLK (CPOL = 0) (Output) SCLK (CPOL = 1) (Output) MISO (Input) ...
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SS (Input) SCLK (CPOL = 0) (Input) t ELD SCLK (CPOL = 1) (Input) t MISO Slave MSB out (Output MOSI (Input) Figure 21. SPI Slave Timing (CPHA = 0) SS (Input) SCLK (CPOL = 0) (Input) SCLK ...
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Quad Timer Timing Operating Conditions SSIO SS SSA Characteristic Timer input period Timer input high/low period Timer output period Timer output high/low period 1. In the formulas listed clock cycle. For 80MHz operation, ...
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RXD SCI receive data pin (Input) TXD SCI receive data pin (Input) 3.11 JTAG Timing Operating Conditions SSIO SS SSA Characteristic 2 TCK frequency of operation TCK cycle time TCK clock pulse width TMS, TDI data ...
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V IH TCK (Input – Figure 26. Test Clock Input Timing Diagram TCK (Input) TDI TMS (Input TDO (Output TDO (Output ) t DV TDO ...
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Part 4 Packaging 4.1 Package and Pin-Out Information DSP56F826 This section contains package and pin-out information for the 100-pin LQFP configuration of the DSP56F826. TMS TDI TDO PIN 1 TRST VDDIO VSSIO A15 A14 A13 A12 A11 A10 A9 A8 ...
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Table 20. DSP56F826 Pin Identification by Pin Number Signal Pin No. Pin No. Name 1 TMS 26 2 TDI 27 3 TDO 28 4 TRST 29 5 VDDIO 30 6 VSSIO 31 7 A15 32 8 A14 33 9 A13 ...
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S 0.15(0.006 -T- - 0.15(0.006 T-U AE -AB- 96X (24X PER SIDE 0.25 (0.010 GAUGE PLANE DETAIL AD Figure 31. 100-pin LQPF Mechanical Information ...
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Part 5 Design Considerations 5.1 Thermal Design Considerations An estimation of the chip junction temperature, T Equation Where ambient temperature ° package junction-to-ambient thermal resistance °C ...
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Use the value obtained by the equation (T case determined by a thermocouple. The junction-to-case thermal resistances quoted in this data sheet are determined using the first definition on page 41. From a practical standpoint, that value is also ...
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Consider all device loads as well as parasitic capacitance due to PCB traces when calculating capacitance. This is especially critical in systems with higher capacitive loads that could create higher transient currents in the V • All inputs must ...
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OnCE™ are trademarks of Motorola, Inc. This document contains information on a new product. Specifications and information herein are subject to change without notice. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes ...