ADSP-BF531WBBCZ-4A AD [Analog Devices], ADSP-BF531WBBCZ-4A Datasheet

ADSP-BF531WBBCZ-4A

Manufacturer Part Number

ADSP-BF531WBBCZ-4A

Description

Blackfin Embedded Processor

Manufacturer

AD [Analog Devices]

Datasheet

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FEATURES

Up to 400 MHz high performance Blackfin processor

0.8 V to 1.2 V core V

1.8 V, 2.5 V, and 3.3 V compliant I/O

160-ball mini-BGA, 169-ball lead free PBGA, and 176-lead

MEMORY

Up to 84K bytes of on-chip memory:

Two dual-channel memory DMA controllers

Memory management unit providing memory protection

Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,

RISC-like register and instruction model for ease of pro-

Advanced debug, trace, and performance monitoring

LQFP packages

16K bytes of instruction SRAM/Cache

32K bytes of instruction SRAM

32K bytes of data SRAM/Cache

4K bytes of scratchpad SRAM

40-bit shifter

gramming and compiler-friendly support

with on-chip voltage regulation

REGULATOR

VOLTAGE

JTAG TEST AND

EMULATION

INSTRUCTION

MEMORY

CORE/SYSTEM BUS INTERFACE

CONTROLLER/

CORE TIMER

Figure 1. Functional Block Diagram

EVENT

MMU

CONTROLLER

BOOT ROM

DMA

MEMORY

DATA

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

External memory controller with glueless support for

Flexible memory booting options from SPI

PERIPHERALS

Parallel peripheral interface PPI/GPIO, supporting

Two dual-channel, full duplex synchronous serial ports, sup-

12-channel DMA controller

SPI-compatible port

Three timer/counters with PWM support

UART with support for IrDA

Event handler

Real-time clock

Watchdog timer

Debug/JTAG interface

On-chip PLL capable of 0.5 to 64 frequency multiplication

Core timer

SDRAM, SRAM, FLASH, and ROM

external memory

ITU-R 656 video data formats

porting eight stereo I

ADSP-BF531/ADSP-BF532

Embedded Processor

WATCHDOG TIMER

SERIAL PORTS (2)

EXTERNAL PORT

REAL-TIME CLOCK

TIMER0, TIMER1,

FLASH, SDRAM

UART PORT

PPI / GPIO

CONTROL

SPI PORT

S channels

TIMER2

IrDA

Blackfin

www.analog.com

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