ADSP21MOD980N AD [Analog Devices], ADSP21MOD980N Datasheet

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ADSP21MOD980N

Manufacturer Part Number
ADSP21MOD980N
Description
MultiPort Internet Gateway Processor
Manufacturer
AD [Analog Devices]
Datasheet
REV. PrB 6/2001
This information applies to a product under development. Its characteristics
and specifications are subject to change without notice. Analog Devices
assumes no obligation regarding future manufacturing unless otherwise
agreed to in writing.
a
Preliminary Technical Data
PERFORMANCE FEATURES
Complete Single Device Multi-Port Internet Gateway
Implements Sixteen Modem Channels or Forty Voice
Each DSP Can Implement two V.34/V.90 Data/Fax
Low Power Version: 640 MIPS Sustained Performance,
Open Architecture Extensible to Voice-over-Network
Low Power Dissipation, 25 mW (typical) per Channel
Powerdown Mode Featuring Low CMOS Standby Power
CONTROL
Host IDMA
Processor (No External Memory Required)
Channels in One Package
Modem Channels (includes Datapump and
Controller)
12.5 ns Instruction Time @ 1.9 Volts nominal
(internal)
(VoN) and Other Applications
Dissipation
SPORT0
SPORT1
Figure 1. MOD980N MultiPort Internet Gateway Processor Block Diagram
2188N
DSP 1
2188N
DSP 2
2188N
DSP 3
21m od980N
2188N
DSP 4
One Technology Way, P .O.Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel:781/329-4700
Fax:781/326-8703
INTEGRATION FEATURES
ADSP-2100 Family Code-Compatible, with Instruction
16 Mbits of On-Chip SRAM, Configured as 9 Mbits of
Dual-Purpose Program Memory, for Both Instruction
352-Ball PBGA with a 35mm
SYSTEM CONFIGURATION FEATURES
16-Bit Internal DMA Port for High-Speed Access to
Programmable Multichannel Serial Port Supports 24/32
Two Double-Buffered Serial Ports with Companding
Separate Reset Pins for Each Internal Processor
Set Extensions
Program Memory and 7 Mbits of Data Memory
and Data Storage
On-Chip Memory (Mode-Selectable)
Channels
Hardware and Automatic Data Buffering
2188N
DSP 5
ADSP-21mod980N
World Wide Web Site: http://www.analog.com
2188N
DSP 6
Gateway Processor
MultiPort Internet
2188N
DSP 7
35mm footprint
©Analog Devices,Inc., 2001
2188N
DSP 8

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ADSP21MOD980N Summary of contents

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Preliminary Technical Data PERFORMANCE FEATURES Complete Single Device Multi-Port Internet Gateway Processor (No External Memory Required) Implements Sixteen Modem Channels or Forty Voice Channels in One Package Each DSP Can Implement two V.34/V.90 Data/Fax Modem Channels (includes Datapump and ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD GENERAL DESCRIPTION The ADSP-21mod980N is a multi-port Internet gateway processor optimized for implementation of a complete V.34/V.90 digital modem. All datapump and controller functions can be implemented ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD The VisualDSP IDE lets programmers define and manage DSP software development. The dialog boxes and property pages let programmers configure and manage all of the ADSP-218x development tools, ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD ARCHITECTURE OVERVIEW Figure 2 on page functional block diagram of the ADSP-21mod980N. It contains eight independent digital signal processors. 17 DATA< 23:8>, A<0 > ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD All eight modem processors have identical functions and have equal status. Each of the modem processors is con- nected to a common IDMA bus and each modem processor ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD Table 1. Common Mode Pins Pin Name( Pins RESET IRQ2 / 8 PF7 8 IRQL1 / 8 PF6 8 IRQL0 ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD Table 2. Host Pins (Mode Modem Processors 1 Input/ Pin Name Function Pins Output 1 IAD[15:0] 32 I/O IDMA Port Address/Data Bus A0 ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD of power-down features. Refer to the ADSP-2100 Family User’s Manual, “System Interface” chapter, for detailed information about the power-down feature. • Quick recovery from power down. The ...

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PRELIMINARY TECHNICA L DATA For current information contact Analog Devices at (800) ANALOGD CLOCK SIGNALS The ADSP-21mod980N is clocked by a TTL-compatible clock signal that runs at half the instruction rate MHz input clock yields a 12.5 ns ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD A clock output (CLKOUT) signal is generated by the pro- cessor at the processor’s cycle rate. This can be enabled and disabled by the CLKODIS bit in ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD 0x2000 - ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD BMWAIT Figure 7. Programmable Flag 1 Since they are multiplexed within the ADSP-21mod980N, PF[2:0] should ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD ever, to write to the processor’s memory-mapped control registers. A typical IDMA transfer process is described as follows: 1. Host starts IDMA transfer 2. Host uses IS and ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD 0x0000 - 0x20 ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD IDMA PORT BOOTING The ADSP-21mod980N boots programs through its Inter- nal DMA port.When Mode Mode and Mode the ADSP-21mod980N ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD DESIGNING AN EZ-ICE-COMPATIBLE SYSTEM The ADSP-21mod980N has on-chip emulation support and an ICE-Port, a special set of pins that interface to the EZ-ICE. These features allow in-circuit ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD ADSP-21mod980N, it may be necessary to reset the target hardware separately to insure the proper mode selection state on emulator chip reset. See the ADSP-2100 Family EZ-Tools data ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD ELECTRICAL SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS Parameter Description V External supply DDEXT V Internal supply DDINT V Input Voltage INPUT T Ambient temperature AMB ELECTRICAL CHARACTERISTICS Parameter 1, ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD ELECTRICAL CHARACTERISTICS (CONTINUED) Parameter I , Supply Current (Idle Supply Current (Dynamic Supply Current (Powerdown Input Pin Capacitance ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD ABSOLUTE MAXIMUM RATINGS Parameter Description V Internal Supply Voltage DDINT V External Supply Voltage DDEXT 1 Input Voltage Output Voltage Swing Storage Temperature Range 1 Applies to ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD POWER DISSIPATION To determine total power dissipation in a specific applica- tion, the following equation should be applied for each output ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD TEST CONDITIONS Figure 14. Voltage Reference Levels for AC Measurements (Except Output Enable/Disable ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD TIMING SPECIFICATIONS This section contains timing information for the DSP’s external signals. General Notes Use the exact timing information given. Do not attempt to derive parameters from ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD Clock and Reset Signals Table 9. Clock and Reset Signals Parameter Description Clock signals (Timing Requirements): t CLKIN Period CKI t CLKIN Width Low CKIL t CLKIN Width ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD Interrupts and Flags Table 10. Interrupts and Flags Parameter Description Timing Requirements: t IRQx, FI, or PFx Setup before CLKOUT Low IFS t IRQx, FI, or PFx Hold ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD Serial Ports Table 11. Serial Ports Parameter Description Timing Requirements: t SCLK Period SCK t DR/TFS/RFS Setup before SCLK Low SCS t DR/TFS/RFS Hold after SCLK Low ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD RFS IN RFS TFS ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD IDMA Address Latch Table 12. IDMA Address Latch Parameter Description Timing Requirements: t Duration of Address Latch IALP t IAD[15:0] Address Setup before Address Latch End IASU ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD IDMA Write, Short Write Cycle Table 13. IDMA Write, Short Write Cycle Parameter Description Timing Requirements: t IACK Low before Start of Write IKW ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD IDMA Write, Long Write Cycle Table 14. IDMA Write, Long Write Cycle Parameter Description Timing Requirements t IACK Low before Start of Write IKW t IAD[15:0] Data ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD IDMA Read, Long Read Cycle Table 15. IDMA Read, Long Read Cycle Parameter Description Timing Requirements: t IACK Low before Start of Read IKR t End of Read ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD IDMA Read, Short Read Cycle Table 16. IDMA Read, Short Read Cycle Parameter Description Timing Requirements: t IACK Low before Start of Read IKR t Duration of ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD IDMA Read - Short Read Cycle in Short Read Only Mode Table 17. IDMA Read - Short Read Cycle in Short Read Only Mode Parameter Description Timing Requirements: ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD 352-BALL PBGA Table 18. Pinout by Signal Name (Continued) PACKAGE PINOUT Signal Name CLKOUT_3 A physical layout of all sig- nals is shown in the CLKOUT_4 following ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD Table 18. Pinout by Table 18. Pinout by Signal Name (Continued) Signal Name (Continued) Signal Name Pin Signal Name GND AF16 GND GND AF17 GND GND AF21 GND ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD Table 18. Pinout by Table 18. Pinout by Signal Name (Continued) Signal Name (Continued) Signal Name Pin Signal Name PF2 C6 PF7_6 PF4_1 M1 PF7_7 PF4_2 C10 ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD Table 18. Pinout by Signal Name (Continued) Signal Name Pin VDDINT R1 VDDINT R2 VDDINT R3 REV. PrB 6/2001 ADSP-21mod980N 39 ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD Signals by Pin Location—Top View, Left to Right GND A0 VDDINT VDDINT B IAD1_A GND VDDINT IAD0_A C IAD4_A IAD2_A GND IRD_A ...

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PRELIMINARY TECHNICAL DATA For current information contact Analog Devices at (800) ANALOGD OUTLINE DIMENSIONS – 352 PLASTIC BALL GRID ARRAY Signals by Pin Location—Top View, Left to Right (Continued IS_2 VDDEXT GND VDDEXT PF7_3 VDDEXT ...

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PRELIMINARY TECHNICAL DATA ADSP-21mod980N For current information contact Analog Devices at (800) ANALOGD 35. DIC 30.70 30. 29.50 2.62 2.37 ...

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