SAA7715 PHILIPS [NXP Semiconductors], SAA7715 Datasheet

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SAA7715

Manufacturer Part Number
SAA7715
Description
Digital Signal Processor
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Preliminary specification
File under Integrated Circuits, IC01
DATA SHEET
SAA7715H
Digital Signal Processor
INTEGRATED CIRCUITS
2001 May 07

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SAA7715 Summary of contents

Page 1

... DATA SHEET SAA7715H Digital Signal Processor Preliminary specification File under Integrated Circuits, IC01 INTEGRATED CIRCUITS 2001 May 07 ...

Page 2

... C-BUS TIMING 16 APPLICATION DIAGRAM 17 PACKAGE OUTLINE 18 SOLDERING 18.1 Introduction to soldering surface mount packages 18.2 Reflow soldering 18.3 Wave soldering 18.4 Manual soldering 18.5 Suitability of surface mount IC packages for wave and reflow soldering methods 19 DATA SHEET STATUS 20 DEFINITIONS 21 DISCLAIMERS 22 PURCHASE OF PHILIPS I 2 Preliminary specification SAA7715H 2 C COMPONENTS ...

Page 3

... Multichannel decoding: Dolby Pro Logic and virtual 3D surround PC/USB audio applications: stereo widening (Incredible surround), sound steering, sound positioning and speaker equalization. 3 Preliminary specification SAA7715H ...

Page 4

... I C-bus interface. 2 C-bus Several system application examples, based on this existing SAA7715, are available for a wide range of audio applications (e.g car radio DSP, DVD post-processing, Dolby Pro Logic, PC/USB audio and more) which can be used as a reference design for customers. CONDITIONS all pins V ...

Page 5

... Acrobat reader. white to force landscape pages to be ... handbook, full pagewidth IIS_BCK1 2 IIS_WS1 3 IIS_IN1 5 IIS_IN4 SAA7715H 6 IIS_IN2 9 IIS_IN3 2 S PLL XRAM YRAM ...

Page 6

... SPDIF2 data input (internally multiplexed with digital serial input 3) SPDIF1 data input (internally multiplexed with digital serial input 2) scan control active HIGH (internal pull down output of SAA7715 s data pin of digital serial output 4 data pin of digital serial output 3 data pin of digital serial output 2 ...

Page 7

... CLK_IN by two digital input/output flag of the DSP-core (F5 of the status register) digital input/output flag of the DSP-core (F6 of the status register) digital input/output flag of the DSP-core (F7 of the status register) EXPLANATION 2 C-bus specification tolerant 7 Preliminary specification SAA7715H ...

Page 8

... IIS_BCK1 IIS_WS1 IIS_IN1 RESERVED1 IIS_IN4 IIS_IN2 RESERVED2 RESERVED3 IIS_IN3 V SSI2 A0 2001 May SAA7715H Fig.2 Pin configuration. 8 Preliminary specification SAA7715H 33 IIS_BCK 32 IIS_WS 31 IIS_OUT1 30 IIS_OUT2 29 IIS_OUT3 28 IIS_OUT4 27 SYSCLK TSCAN 26 25 SPDIF1 24 SPDIF2 V DDE 23 MGT827 ...

Page 9

... SYSCLK (n 0 512 1 384 0 256 1 192 0 128 9 Preliminary specification SAA7715H 2 C-bus (see Table 10). DSP_TURBO DIV_CLK_IN clock. The memory map of the I s sel_loop_div[1:0] ...

Page 10

... The flags can be used by the DSP depending on the downloaded software. 10 Preliminary specification P OWER OFF PLOP SUPPRESSION P VREFDA IN FOR INTERNAL REFERENCE S UPPLY OF THE ANALOG OUTPUTS and V DDA1 must have sufficient decoupling to prevent THD External control pins SAA7715H is DDA1 . SSA1 . The SSA1 ...

Page 11

... For communication with external digital sources a digital serial bus is implemented serial 3-line bus, having one line for data, one line for clock and one line for the word select. For external digital sources the SAA7715 acts as a slave, so the external source is master and supplies the clock. ...

Page 12

Acrobat reader. white to force landscape pages to be ... WS LEFT BCK DATA MSB B2 MSB INPUT ...

Page 13

... C-bus format is described in “The I The I to use it” , order no. 9398 393 40011. For the external control of the SAA7715 a fast I implemented. This is a 400 kHz bus which is downward compatible with the standard 100 kHz bus. There are two different types of control instructions: ...

Page 14

... SAA7715 address ‘0011110’ but this time followed by 2 C-bus, the device a logic 1 (read) of the read/write bit. From this moment on the SAA7715 will send the memory content in groups of 3 (X/Y-memory or registers (P-memory) bytes to the 2 I C-bus each time acknowledged by the master. The ...

Page 15

... ACK = acknowledge from SAA7715 (SDA LOW repeat n-times the bytes data group Negative Acknowledge master (SDA HIGH). ADDR H and ADDR L = address DSP register. DATA 1 to DATA bytes data word. Fig.6 Master transmitter reads from the SAA7715 registers ADDR L ...

Page 16

... Philips Semiconductors Digital Signal Processor 9.5 Program RAM The SAA7715 has a 1.5 kbyte PRAM to store the DSP instruction code into. Also a 2 kbyte PROM is on-chip available and can be accessed (memory mapped) without the need of selecting the PROM or PRAM. The DSP instruction code can be downloaded into the PRAM via the ...

Page 17

... XRAM of DSP. Table 9 shows the detailed memory map of those locations. All locations are acknowledged by the SAA7715 even if the user tries to write to a reserved space. The data in these sections will be lost. Reading from these locations will result in undefined data words. ...

Page 18

... DESCRIPTION channel status SPDIF in right LSB bits DESCRIPTION channel status SPDIF in right MSB bits Preliminary specification SAA7715H BIT DEFAULT POSITION 0 0 00011 ...

Page 19

... SPDIF2 or digital serial input 3 1: SPDIF2 0: digital serial input 3 select channel status information taken from SPDIF1 or SPDIF2 1: from input SPDIF2 0: from input SPDIF1 reserved 19 Preliminary specification SAA7715H BIT DEFAULT POSITION 00000H BIT DEFAULT POSITION 00000H ...

Page 20

... Preliminary specification 0050C6H 0010DBH 000000H 000000H 000000H 000000H OUTPUT 2 standard I S-bus LSB-justified, 16 bits LSB-justified, 18 bits LSB-justified, 20 bits LSB-justified, 24 bits OUTPUT 2 standard I S-bus LSB-justified, 16 bits LSB-justified, 18 bits LSB-justified, 20 bits LSB-justified, 24 bits SAA7715H ...

Page 21

... Compression ratio is changed by selecting one of the values in the drop-down list labelled ‘Ratio’. To increase the amount of compression, select one of the higher ratios. For a more subtle effect, select a lower setting, such as input level (dB) 1.5:1. MGT830 21 Preliminary specification SAA7715H Control parameters Fixed versus variable mode Threshold Ratio ...

Page 22

... More specifically, for each band, users can control the band’s centre frequency, and also the width of the band of frequencies that are affected. 22 Preliminary specification SAA7715H ...

Page 23

... INTS AND TIPS Try a mix setting of about 0 starting point. For best results, position yourself between the speakers and a couple of feet back. Ideally, your ears should be at about the same level as the speakers, but this is not so critical. 23 Preliminary specification SAA7715H ...

Page 24

... CIC specification/test method PARAMETER mounted on printed-circuit board 24 Preliminary specification CONDITIONS MIN. 0.5 0.5 > 0 > 0 < 0 200 2000 100 CONDITIONS VALUE 60 SAA7715H MAX. UNIT +3 +85 C +125 600 mW UNIT K/W ...

Page 25

... V; unless otherwise specified DD standard output slew rate output slew rate output slew rate output Preliminary specification SAA7715H MIN. TYP. MAX. 3.15 3.3 3. 6.5 13 250 13.5 27 380 400 2.0 0.8 ...

Page 26

... slew rate output slew rate output C-bus output 400 3.3 V; unless otherwise specified amb DDA2 at 1 kHz 26 Preliminary specification SAA7715H MIN. TYP. MAX. 0.4 0.4 0.4 0.4 0 140 30 50 100 3.5 6 200 3 ...

Page 27

... CONDITIONS = 44.1 kHz all voltages referenced to ground; s amb L pins 34 and 36 (THD + N)/S < 0. pin code = kHz; ripple ripple(p-p) 27 Preliminary specification SAA7715H MIN. TYP. MAX. 0.13 3.0 0.22 3 200 28 1000 0 100 80 50 UNIT ...

Page 28

... CONDITIONS Preliminary specification SAA7715H LEFT t su(WS) t su(D) t h(D) MSB MSB MIN. TYP. MAX. 162 0.15T 0.15T 0.35T cy 0.35T cy 0.2T cy 0.2T cy 0.15T 0.2T cy 0.2T cy MGM129 UNIT ns ns ...

Page 29

... SU;DAT t SU;STA t HIGH Sr Fig.10 Definition of timing on the I STANDARD MODE CONDITIONS MIN. 0 4.7 4.0 4.7 4.0 4.7 0 250 4.0 not applicable 29 Preliminary specification SAA7715H t HD;STA SU;STO P 2 C-bus. 2 FAST MODE I C-BUS 2 I C-BUS MAX. MIN. MAX. 100 0 400 1.3 0.6 1.3 0.6 0.6 0 0.9 100 1000 ...

Page 30

... Acrobat reader. white to force landscape pages to be ... SPDIF input signals 75 75 100 nF 100 nF 100 pF 100 IIS_BCK1 1 IIS_WS1 2 IIS_IN1 3 IIS_IN4 5 digital SAA7715H inputs IIS_IN2 6 IIS_IN3 DSP CLOCK PLL 22 41 (1) Omit this capacitor when a microcontroller is used. 100 100 100 ...

Page 31

... 2.5 scale (1) ( 0.40 0.25 10.1 10.1 12.9 0.8 0.20 0.14 9.9 9.9 12.3 REFERENCES JEDEC EIAJ 31 Preliminary specification detail 12.9 0.95 1.3 0.15 0.15 0.1 12.3 0.55 EUROPEAN PROJECTION SAA7715H SOT307 (1) ( 1.2 1 0.8 0.8 0 ISSUE DATE 95-02-04 97-08-01 ...

Page 32

... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 32 Preliminary specification SAA7715H ...

Page 33

... This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. 33 Preliminary specification SAA7715H SOLDERING METHOD WAVE REFLOW suitable (2) suitable ...

Page 34

... C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 34 Preliminary specification SAA7715H These products are not Philips Semiconductors 2 C patent to use the 2 C specification defined by ...

Page 35

... Philips Semiconductors Digital Signal Processor 2001 May 07 NOTES 35 Preliminary specification SAA7715H ...

Page 36

Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + 101 ...

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