CP80S54E ETC2 [List of Unclassifed Manufacturers], CP80S54E Datasheet
CP80S54E
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CP80S54E Summary of contents
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... EPROM/ROM-Based 8-Bit Microcontroller Series Devices Included in this Data Sheet: ‧ CP80S54E/S56E : EPROM devices ‧ CP80S54/S56 : Mask ROM devices FEATURES ‧ Only 42 single word instructions ‧ All instructions are single cycle except for program branches which are two-cycle ‧ 13-bit wide instructions ‧ ...
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GENERAL DESCRIPTION The CP80S54/S56 series is a family of low-cost, high speed, high noise immunity, EPROM/ROM-based 8-bit CMOS microcontrollers. It employs a RISC architecture with only 42 instructions. All instructions are single cycle except for program branches which take two ...
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PIN CONNECTION PDIP, SOP IOA2 1 IOA3 2 IOA4/T0CKI 3 CP8054S IOA5/RSTB 4 CP8054SE Vss 5 CP8056S IOB0/INT 6 CP8056SE IOB1 7 IOB2 8 IOB3 9 PIN DESCRIPTIONS Name I/O IOA0 ~ IOA7 I/O IOA0 ~ IOA7 as bi-direction I/O ...
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MEMORY ORGANIZATION CP80S54/S56 memory is organized into program memory and data memory. 1.1 Program Memory Organization The CP80S54/S54E have a 9-bit Program Counter (PC) capable of addressing a 512×13 program memory space. The CP80S56/S56E have a 10-bit Program Counter ...
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Data Memory Organization Data memory is composed of Special Function Registers and General Purpose Registers. The General Purpose Registers are accessed either directly or indirectly through the FSR register. The Special Function Registers are registers used by the CPU ...
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FUNCTIONAL DESCRIPTIONS 2.1 Operational Registers 2.1.1 INDF (Indirect Addressing Register) Address Name B7 00h (r/w) INDF Uses contents of FSR to address data memory (not a physical register) The INDF Register is not a physical register. Any instruction accessing ...
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TMR0 (Time Clock/Counter register) Address Name B7 01h (r/w) TMR0 The Timer0 is a 8-bit timer/counter. The clock source of Timer0 can come from the instruction cycle clock external clock source (T0CKI pin) defined by T0CS ...
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FIGURE 2.2: Loading Different Situations Situation 1: GOTO Instruction PCH Situation 2: CALL Instruction PCH Situation 3: RETIA, RETFIE, ...
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STATUS (Status Register) Address Name B7 03h (r/w) STATUS GP2 This register contains the arithmetic status of the ALU, the RESET status. If the STATUS Register is the destination for an instruction that affects the ...
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PORTA & PORTB (Port Data Registers) Address Name B7 05h (r/w) PORTA IOA7 06h (r/w) PORTB IOB7 Reading the port (PORTA, PORTB register) reads the status of the pins independent of the pin’s input/output modes. Writing to these ports ...
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Enable the input change interrupt/wake-up function of IOB4 pin. WUB5 : = 0, Disable the input change interrupt/wake-up function of IOB5 pin Enable the input change interrupt/wake-up function of IOB5 pin. WUB6 : = 0, Disable ...
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ODCON (Open-drain Control Register) Address Name B7 0Ch (r/w) ODCON ODB7 ODB0 : = 0, Disable the internal open-drain of IOB0 pin Enable the internal open-drain of IOB0 pin. ODB1 : = 0, Disable the internal open-drain ...
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Enable the internal pull-high of IOB7 pin Disable the internal pull-high of IOB7 pin. 2.1.13 INTEN (Interrupt Mask Register) Address Name B7 0Eh (r/w) INTEN GIE T0IE : Timer0 overflow interrupt enable bit. = ...
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OPTION Register Address Name B7 N/A (w) OPTION - Accessed by OPTION instruction. By executing the OPTION instruction, the contents of the ACC Register will be transferred to the OPTION Register. The OPTION Register is a 7-bit wide, write-only ...
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I/O Ports Port A and port B are bi-directional tri-state I/O ports. Port A and Port B are 8-pin I/O ports. Port general purpose register. Please note that IOA5 is an input only pin. All I/O ...
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IOB0/INT : IOST R WR PORT RD PORT Set PBIF WUBn EIS INT Pull-high/pull-down and open-drain are not shown in the figure IOB7 ~ IOB1 : IOST R WR PORT RD PORT Set PBIF WUBn Pull-high/pull-down and open-drain are not ...
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Timer0/WDT & Prescler Timer0 2.3.1 The Timer0 is a 8-bit timer/counter. The clock source of Timer0 can come from the internal clock external clock source (T0CKI pin). 2.3.1.1 Using Timer0 with an Internal Clock : Timer ...
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FIGURE 2.4: Block Diagram of The Timer0/WDT Prescaler Instruction Cycle (Fosc/4 or Fosc/2 or Fosc/1 or Fosc/8) 0 MUX T0CKI 1 T0SE T0CS 0 MUX Watchdog 1 Timer PSA 2.4 Interrupts The CP80S54/S56 series has up to three sources of ...
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Port B Input Change Interrupt An input change on IOB<7:0> set flag bit PBIF (INTFLAG<1>). This interrupt can be disabled by clearing PBIE bit (INTEN<1>). Before the port B input change interrupt is enabled, reading PORTB (any instruction accessed ...
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Power-up Reset Timer(PWRT) The Power-up Reset Timer provides a nominal 18ms delay after Power-on Reset (POR), Brown-out Reset (BOR), RSTB Reset or WDT time-out Reset. The device is kept in reset state as long as the PWRT is active. ...
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TABLE 2.1: Reset Conditions for All Registers Register ACC OPTION IOSTA IOSTB INDF TMR0 PCL STATUS FSR PORTA PORTB General Purpose Register PCON WUCON PCHBUF PDCON ODCON PHCON INTEN INTFLAG General Purpose Registers Legend unchanged unknown, ...
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Hexadecimal Convert to Decimal (HCD) Decimal format is another number format for CP80S54/S56. When the content of the data memory has been assigned as decimal format necessary to convert the results to decimal format after the execution ...
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Oscillator Configurations CP80S54/S56 can be operated in four different oscillator modes. Users can program three configuration bits (Fosc<2:0>) to select the appropriate modes: ‧ ERC: External Resistor/Capacitor Oscillator ‧ HF: High Frequency Crystal/Resonator Oscillator ‧ XT: Crystal/Resonator Oscillator ‧ ...
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FIGURE 2.8: ERC Oscillator Mode FIGURE 2.9: IRC Oscillator Mode (Internal R, Internal C Oscillator) FIGURE 2.10: ERIC Oscillator Mode (External R, Internal C Oscillator) Rext Cext (optional) Rext CP80S54/S56 OSCI Internal Cext Circuit OSCO /1, /2, /4, /8 CP80S54/S56 ...
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Configurations Word TABLE 2.4: Configurations Word 0 bit Name Oscillator Selection Bits = Fosc<2:0> ...
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INSTRUCTION SET Mnemonic, Description Operands R, bit Clear bit in R BCR R, bit Set bit in R BSR R, bit Test bit in R, Skip if Clear BTRSC R, bit Test bit in R, Skip if Set BTRSS ...
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Rotate right f through Carry RRR R, d Swap R SWAPR R, d Move Immediate to ACC MOVIA I Add ACC and Immediate ADDIA I Subtract ACC from Immediate SUBIA I AND Immediate with ACC ANDIA I OR Immediate with ...
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ADCAR Add ACC and R with Carry Syntax: ADCAR R, d ≤ ≤ Operands ∈ d [0,1] Operation ACC + C Status Affected: C, DC, Z Description: Add the contents of the ACC register and ...
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BCR Clear Bit in R Syntax: BCF R, b ≤ ≤ Operands ≤ ≤ Operation: 0 R<b> Status Affected: None Description: Clear bit ‘b’ in register ‘R’. Cycles: 1 BSR Set Bit in R ...
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CLRA Clear ACC Syntax: CLRA Operands: None Operation: 00h ACC Status Affected: Z Description: The ACC register is cleared. Zero bit (Z) is set. Cycles: 1 CLRR Clear R Syntax: CLRR R ≤ ≤ Operands ...
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DAS Adjust ACC’s data format from HEX to DEC Syntax: DAS Operands: None Operation: ACC(hex) ACC(dec) Status Affected: None Description: Convert the ACC data from hexadecimal to decimal format after any subtraction operation and restored to ACC. Cycles: 1 DECR ...
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INCRSZ Increment R, Skip if 0 Syntax: INCRSZ R, d ≤ ≤ Operands ∈ d [0,1] Operation dest, skip if result = 0 Status Affected: None Description: The contents of register ‘R’ are incremented. ...
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MOVAR Move ACC to R Syntax: MOVAR R ≤ ≤ Operands Operation: ACC R Status Affected: None Description: Move data from the ACC register to register ‘R’. Cycles: 1 MOVIA Move Immediate to ACC Syntax: MOVIA I ...
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RETIA Return with Immediate in ACC Syntax: RETIA I ≤ ≤ Operands 255 Operation: I ACC; Top of Stack Status Affected: None Description: The ACC register is loaded with the 8-bit immediate ‘I’. The program counter is loaded ...
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SLEEP Enter SLEEP Mode Syntax: SLEEP Operands: None Operation: 00h WDT; 00h WDT prescaler Status Affected: Description: Time-out status bit ( set. The power-down status bit ( PD ) ...
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XORAR Exclusive OR ACC with R Syntax: XORAR R, d ≤ ≤ Operands ∈ d [0,1] Operation: ACC xor R Status Affected: Z Description: Exclusive OR the contents of the ACC register with register ’R’. If ‘d’ ...
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ABSOLUTE MAXIMUM RATINGS Ambient Operating Temperature Store Temperature DC Supply Voltage (Vdd) Input Voltage with respect to Ground (Vss) 5.0 OPERATING CONDITIONS DC Supply Voltage Operating Temperature CP80S54/56 0℃ to +70℃ -65℃ to +150℃ +6.0V -0.3V to ...
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... ELECTRICAL CHARACTERISTICS 6.1 ELECTRICAL CHARACTERISTICS of CP80S54E/S56E To be defined 6.2 ELECTRICAL CHARACTERISTICS of CP80S54/S56 Under Operating Conditions, at four clock instruction cycles and WDT & LVDT are disabled Sym Description HF mode, Vdd=5V F X’tal oscillation range HF HF mode, Vdd=3V LF mode, Vdd=5V F X’tal oscillation range LF LF mode, Vdd=3V ...
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HF mode, Vdd=3V, 4 clock instruction 20MHz 15MHz I Operating current DD 10MHz 4MHz 2MHz HF mode, Vdd=5V, 2 clock instruction 20MHz 15MHz I Operating current DD 10MHz 4MHz 2MHz HF mode, Vdd=3V, 2 clock instruction 20MHz 15MHz ...
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ERC mode, Vdd=5V, 4 clock instruction C=3P C=20P I Operating current DD C=100P C=300P ERC mode, Vdd=3V, 4 clock instruction C=3P C=20P I Operating current DD C=100P C=300P I Operating current ERC mode, Vdd=5V, 2 clock instruction DD C=3P R=1Kohm ...
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C=20P C=100P C=300P ERC mode, Vdd=3V, 2 clock instruction C=3P C=20P I Operating current DD C=100P C=300P ERIC mode, external R, Vdd=5V, I Operating current DD 4 clock instruction R=47Kohm R=10Kohm F=8.42MHz R=100Kohm F=1.046MHz R=300Kohm F=376KHz R=1Kohm F=21.88MHz R=3.3Kohm F=10.16MHz ...
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R=100Kohm R=300Kohm R=470Kohm R=1Mohm R=2Mohm R=5.1Mohm R=10Mohm R=20Mohm ERIC mode, external R, Vdd=3V, 4 clock instruction R=47Kohm R=100Kohm R=300Kohm R=470Kohm I Operating current DD R=1Mohm R=2Mohm R=5.1Mohm R=10Mohm R=20Mohm ERIC mode, external R,Vdd=5V, 2 clock instruction R=47Kohm R=100Kohm R=300Kohm R=470Kohm ...
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IRC mode, internal R, Vdd=3V, 4 clock instruction I Operating current DD F=3.2MHz IRC mode, internal R,Vdd=5V, 2 clock instruction I Operating current DD F=3.2MHz IRC mode, internal R,Vdd=3V, 2 clock instruction I Operating current DD F=3.2MHz CP80S54/56 mA 187 ...
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PACKAGE DIMENSION 7.1 18-PIN PDIP 300mil D 0.727 BOTTOM E-PIN INDENT £ 0.118 Dimension In Millimeters Symbols Min 0. 0.36 B1 1.27 C 0.20 D 22.71 D1 0.43 E 7.62 ...
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SOP 300mil (4x Dimension In Millimeters Symbols Min A 2. 0.33 C 0.18 D 11. 10.01 L 0.38 θ 0° View ¨ A ...
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SSOP 209mil 0.004max. Symbols θ View ¨ -H- GAUGE PLANE SEATING PLANE £ View ¨ Dimension In ...
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... ORDERING INFORMATION OTP Type MCU CP80S54EP CP80S54ED CP80S54ER CP80S56EP CP80S56ED CP80S56ER Mask Type MCU CP80S54P CP80S54D CP80S54R CP80S56P CP80S56D CP80S56R Package Type Pin Count PDIP 18 SOP 18 SSOP 20 PDIP 18 SOP 18 SSOP 20 Package Type Pin Count PDIP 18 SOP 18 SSOP 20 PDIP 18 SOP 18 SSOP 20 CP80S54/56 ...