MC68HC12 MOTOROLA [Motorola, Inc], MC68HC12 Datasheet - Page 406
MC68HC12
Manufacturer Part Number
MC68HC12
Description
The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC12.pdf
(478 pages)
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STATUS— BDM Status Register (1)
Development Support
20.4.5.1 STATUS
Technical Data
406
RESET:
RESET:
1. ENBDM is set to 1 by the firmware in Special Single Chip mode.
(NOTE 1)
ENBDM
BIT 7
0
0
BDMACT
6
1
0
is temporary storage for BDM commands.The CCRSAV register
preserves the content of the CPU12 CCR while BDM is active.
The only registers of interest to users are the STATUS register and the
CCRSAV register.The other BDM registers are only used by the BDM
firmware to execute commands.The registers are accessed by means of
the hardware READ_BD and WRITE_BD commands, but should not be
written during BDM operation (except the CCRSAV register which could
be written to modify the CCR value).
The STATUS register is read and written by the BDM hardware as a
result of serial data shifted in on the BKGD pin.
Read: all modes.
Write: Bits 3 through 5, and bit 7 are writable in all modes. Bit 6,
BDMACT, can only be written if bit 7 H/F in the INSTRUCTION register
is a zero. Bit 2, CLKSW, can only be written if bit 7 H/F in the
INSTRUCTION register is a one. A user would never write ones to bits
3 through 5 because these bits are only used by BDM firmware.
ENBDM — Enable BDM (permit active background debug mode)
BDMACT — Background Mode Active Status
ENTAG
0 = BDM cannot be made active (hardware commands still
1 = BDM can be made active to allow firmware commands.
5
0
0
allowed).
SDV
Development Support
4
0
0
TRACE
3
0
0
CLKSW
2
0
0
1
0
0
-
MC68HC912DT128A — Rev 4.0
BIT 0
0
0
-
All other modes
Special Single
Chip & Periph
MOTOROLA
$FF01
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