AT83C24NDS-PRRUM ATMEL [ATMEL Corporation], AT83C24NDS-PRRUM Datasheet - Page 23

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AT83C24NDS-PRRUM

Manufacturer Part Number
AT83C24NDS-PRRUM
Description
Smart Card Reader Interface with Power Management
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
4234F–SCR–10/05
Table 9. CONFIG3 (Config Byte 3)
Number
Bit
7-5
4
3
2
1
0
EAUTO
7
Mnemonic Description
ICCADJ
EAUTO
VEXT1
VEXT0
Bit
LP
X
X
X
VEXT1
6
EVCC voltage configuration:
EAUTO VEXT1 VEXT0
0
0
0
0
1
if EVCC is supplied from the external EVCC pin, the user can switch off the
internal EVCC regulator to decrease the consumption.
If EVCC is switched off, and no external EVCC is supplied, the AT83C24 is
inactive until a hardware reset is done.
The reset value is 100.
CI
This bit controls the DC/DC sensitivity to any overflow current .
Set this bit to decrease the DC/DC sensitivity (CI
20%, see Electrical Characteristics). The start of the DC/DC with a high current
load is easier.
Clear this bit to have a normal configuration.
The reset value is 0.
Low-power Mode
Set this bit to enable low-power mode during shutdown mode (pulsed mode
activated).
Clear this bit to disable low-power mode during shutdown mode.
The activation reference is the following:
• First select the Low-power mode by setting LP bit.
• The activation of SHUTDOWN bit can then be done.
This bit as no effect when SHUTDOWN bit is cleared.
The reset value is 0.
This bit should not be set.
This bit should not be set.
This bit should not be set.
CC
overflow adjust
VEXT0
0
0
1
1
X
5
0 EVCC = 0 the regulator is switched off.
1EVCC = 2.3V
0 EVCC = 1.8V
X EVCC voltage is the level detected on I/O input pin.
1 EVCC = 2.7V
ICCADJ
4
LP
3
CC_ovf
X
2
is increased by about
AT83C24
1
X
0
X
23

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