MC68HC908GR4 MOTOROLA [Motorola, Inc], MC68HC908GR4 Datasheet - Page 187
MC68HC908GR4
Manufacturer Part Number
MC68HC908GR4
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908GR4.pdf
(408 pages)
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14.4.4 LVI Trip Selection
14.5 LVI Status Register
MC68HC908GR8 — Rev 4.0
MOTOROLA
NOTE:
Address:
The LVI5OR3 bit in the configuration register selects whether the LVI is
configured for 5V or 3V protection.
The microcontroller is guaranteed to operate at a minimum supply
voltage. The trip point (V
this. (See
The LVI status register (LVISR) indicates if the V
detected below the V
LVIOUT — LVI Output Bit
Reset:
Read: LVIOUT
Write:
This read-only flag becomes set when the V
V
Freescale Semiconductor, Inc.
TRIPF
For More Information On This Product,
$FE0C
Bit 7
0
trip voltage. See
Electrical Specifications
Go to: www.freescale.com
V
Figure 14-3. LVI Status Register (LVISR)
Low-Voltage Inhibit (LVI)
TRIPF
= Unimplemented
V
V
6
0
0
DD
Table 14-1. LVIOUT Bit Indication
DD
V
V
> V
TRIPF
DD
DD
V
TRIPR
TRIPF
TRIPF
5
0
0
V
level.
Table
TRIPR
[5 V] or V
14-1. Reset clears the LVIOUT bit.
4
0
0
for the actual trip point voltages.)
TRIPF
3
0
0
Previous value
LVIOUT
[3 V]) may be lower than
DD
0
1
DD
voltage falls below the
2
0
0
Low-Voltage Inhibit (LVI)
voltage was
LVI Status Register
1
0
0
Technical Data
Bit 0
0
0
187
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