MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 80

• Manufacturer Part Number: MC68HC908QY2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

System Integration Module (SIM)
7.4.3 Clocks in Stop Mode and Wait Mode
7.5 Reset and System Initialization
7.5.1 External Pin Reset
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MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
Upon exit from stop mode by an interrupt, break, or reset, the SIM allows
BUSCLKX4 to clock the SIM counter. The CPU and peripheral clocks do
not become active until after the stop delay time out. This time out is
selectable as 4096 or 32 BUSCLKX4 cycles. See
In wait mode, the CPU clocks are inactive. The SIM also produces two
sets of clocks for other modules. Refer to the wait mode subsection of
each module to see if the module is active or inactive in wait mode.
Some modules can be programmed to be active in wait mode.
The MCU has these reset sources:
All of these resets produce the vector $FFFE–FFFF ($FEFE–FEFF in
monitor mode) and assert the internal reset signal (IRST). IRST causes
all registers to be returned to their default values and all modules to be
returned to their reset states.
An internal reset clears the SIM counter (see
external reset does not. Each of the resets sets a corresponding bit in
the SIM reset status register (SRSR). See
The RST pin circuits include an internal pullup device. Pulling the
asynchronous RST pin low halts all processing. The PIN bit of the SIM
reset status register (SRSR) is set as long as RST is held low for a
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Power-on reset module (POR)
External reset pin (RST)
Computer operating properly module (COP)
Low-voltage inhibit module (LVI)
Illegal opcode
Illegal address
System Integration Module (SIM)
7.9 SIM
7.6 SIM
7.8.2 Stop
Registers.
Counter), but an
MOTOROLA
Mode.