AT89C51IC2-RLTIM ATMEL [ATMEL Corporation], AT89C51IC2-RLTIM Datasheet - Page 37

• Manufacturer Part Number: AT89C51IC2-RLTIM
• Description: 8-bit Flash Microcontroller with 2-wire Interface
• Manufacturer: ATMEL [ATMEL Corporation]

4301C–8051–06/06
Table 26. CMOD Register
CMOD - PCA Counter Mode Register (D9h)
Reset Value = 00XX X000b
Not bit addressable
The CMOD register includes three additional bits associated with the PCA (See
Figure 11 and Table 26).
•
•
•
The CCON register contains the run control bit for the PCA and the flags for the PCA
timer (CF) and each module (Refer to Table 27).
•
•
•
Number
CIDL
The CIDL bit which allows the PCA to stop during idle mode.
The WDTE bit which enables or disables the watchdog function on module 4.
The ECF bit which when set causes an interrupt and the PCA overflow flag CF (in
the CCON SFR) to be set when the PCA timer overflows.
Bit CR (CCON.6) must be set by software to run the PCA. The PCA is shut off by
clearing this bit.
Bit CF: The CF bit (CCON.7) is set when the PCA counter overflows and an
interrupt will be generated if the ECF bit in the CMOD register is set. The CF bit can
only be cleared by software.
Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1,
etc.) and are set by hardware when either a match or a capture occurs. These flags
also can only be cleared by software.
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
WDTE
WDTE
CPS1
CPS0
CIDL
ECF
Bit
6
-
-
-
Counter Idle Control
Cleared to program the PCA Counter to continue functioning during idle Mode.
Set to program PCA to be gated off during idle.
Watchdog Timer Enable
Cleared to disable Watchdog Timer function on PCA Module 4.
Set to enable Watchdog Timer function on PCA Module 4.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA Count Pulse Select
CPS1
0
0
1
1
PCA Enable Counter Overflow Interrupt
Cleared to disable CF bit in CCON to inhibit an interrupt.
Set to enable CF bit in CCON to generate an interrupt.
5
-
CPS0Selected PCA input
0 Internal clock fCLK PERIPH/6
1 Internal clock fCLK PERIPH/2
0 Timer 0 Overflow
1 External clock at ECI/P1.2 pin (max rate = fCLK PERIPH/ 4)
4
-
3
-
CPS1
2
AT89C51IC2
CPS0
1
ECF
0
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