MAX2366 MAXIM [Maxim Integrated Products], MAX2366 Datasheet - Page 12

• Manufacturer Part Number: MAX2366
• Description: Complete Dual-Band Quadrature Transmitters
• Manufacturer: MAXIM [Maxim Integrated Products]

Complete Dual-Band
Quadrature Transmitters
RFH0 and RFH1 are optimized for split-band PCS opera-
tion. The PA drivers have open-collector outputs and
require pullup inductors. The pullup inductors can act
as the shunt element in a shunt series match.
The MAX2366/MAX2367/MAX2368 include seven pro-
grammable registers consisting of four divide registers,
a configuration register, an operational control register,
and a test register. Each register consists of 24 bits.
The 4 least significant bits (LSBs) are the register’s
address. The 20 most significant bits (MSBs) are used
for register data. All registers contain some “don't care”
bits. These can be either a zero or a 1 and do not affect
operation (Figure 1). Data is shifted in MSB first, fol-
lowed by the 4-bit address. When CS is low, the clock
is active and data is shifted with the rising edge of the
clock. When CS transitions to high, the shift register is
latched into the register selected by the contents of the
address bits. Power-up defaults for the seven registers
are shown in Table 2. The dividers and control registers
are programmed from the SPI/QSPI/MICROWIRE-com-
patible serial port.
The RFM register sets the main frequency divide ratio
for the RF PLL. The RFR register sets the reference fre-
quency divide ratio. The RF VCO frequency can be
determined by the following:
IFM and IFR registers are similar:
where f
The operational control register (OPCTRL) controls the
state of the MAX2366/MAX2367/MAX2368. See Table 3
for the function of each bit.
Table 2. Register Power-Up Default States
12
REGISTER
______________________________________________________________________________________
OPCTRL
CONFIG
TEST
RFM
REF
RFR
IFM
IFR
RF VCO frequency = f
IF VCO frequency = f
is the external reference frequency.
172087 dec
DEFAULT
D03F hex
Programmable Registers
1968 dec
6519 dec
0492 dec
892F hex
0000 hex
REF
REF
✕
✕
(IFM / IFR)
(RFM / RFR)
ADDRESS
0000
0001
0010
0011
0100
0101
0111
b
b
b
b
b
b
b
RF M divider count
RF R divider count
IF M divider count
IF R divider count
Operational control settings
Configuration and setup control
Test-mode control
The configuration register (CONFIG) sets the configura-
tion for the RF/IF PLL and the baseband I/Q input lev-
els. See Table 4 for a description of each bit.
The test register is not needed for normal use.
Bias control is distributed among several functional
sections and can be controlled to accommodate many
different power-down modes as shown in Table 5.
The shutdown control bit is of particular interest since it
differs from the SHDN pin. When the shutdown control
bit is active (SHDN_BIT = 0), the serial interface is left
active so that the part can be turned on with the serial
bus while all other functions remain shut off. In contrast,
when the SHDN pin is low it shuts down everything. In
either case, PLL programming and register information
is lost. To retain the register information, use standby
mode (STBY = 0).
Table 6 shows an example of key registers for triple-
mode operation, assuming half-band PCS and IF fre-
quencies of 130MHz/165MHz.
The MAX2366 is designed for use in dual-band, triple-
mode systems. It is recommended for triple-mode hand-
sets (Figure 2). The MAX2367 is designed for use in
CDMA PCS handsets or WLL single-mode 2.4GHz ISM
systems (Figure 3). The MAX2368 is designed for use in
dual-mode cellular systems (Figure 4).
Figure 5 shows the 3-wire interface timing diagram. The
3-wire bus is SPI/QSPI/MICROWIRE compatible.
Applications Information
FUNCTION
Signal Flow Control
Power Management
3-Wire Interface