ML6431CH MICRO-LINEAR [Micro Linear Corporation], ML6431CH Datasheet
ML6431CH
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ML6431CH Summary of contents
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Digital Audio Clock for NTSC, PAL & VGA GENERAL DESCRIPTION The ML6430/ML6431 are multi-standard single-chip BiCMOS video Genlock ICs for NTSC, PAL and VGA. They are designed to provide a stable clock from an analog video signal, and to provide ...
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ML6430/ML6431 PIN CONFIGURATION SLEEP/54MHz C VIN /H SYNC P2/S DATA SLEEP/54MHz C VIN /H SYNC 2 ML6430 32-Pin TQFP (H32- P2/S DATA 1 P3/S CLK GND ...
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PIN DESCRIPTION (NOTE: ML6430 and ML6431 pin functions are identical except for pin 16. See below) PIN NAME FUNCTION 1 P2/S This is a dual function pin. If presets DATA are enabled, refer to Table 7. If presets are disabled, ...
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ML6430/ML6431 PIN DESCRIPTION (Continued) PIN NAME FUNCTION 23 H Horizontal reset; active low for one RESET half pixel Vertical blanking, active low BLANK 25 H Horizontal blanking, active low BLANK 26 C Composite sync output. May be either ...
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ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. DC Supply Voltage (V A & ............. ...
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ML6430/ML6431 GENLOCK PERFORMANCE SPECIFICATIONS Unless otherwise noted See Figure 1 for parameter measurement definition PARAMETER SYNC SEPARATION Min Sync Amplitude Max Video Amplitude Clamp timing error Clamp Recovery TIme CLOCK RECOVERY Short Term Output ...
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SERIAL BUS LOGIC (Continued) PARAMETER SYSTEM TIMING (Continued) Wait Time From STOP to START DATA WAIT Hold Time for START DATA HD/START Setup Time for START DATA SU/START Min LOW ...
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ML6430/ML6431 DEVICE DIFFERENCES Tables 1 and 2 summarize the differences between the ML6430 and ML6431. The pinouts of the ML6430 and the ML6431 are the same with the exception that the ML6431 DEVICE FUNCTIONAL DESCRIPTION Video Formats, Timing, Clock and ...
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FUNCTIONAL DESCRIPTION DUAL PLLS The Genlock has the following properties: • A stable, asynchronous crystal controlled oscillator provides the basic timing signals. • A precision analog circuit uses the above timing signals to generate an arbitrarily phased output whose phase ...
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ML6430/ML6431 FUNCTIONAL DESCRIPTION CENTER FREQUENCY AND ± RANGE FOR EACH FREQUENCY STANDARD OF THE ML6430 VIDEO STANDARD CLOCK RATE 3.58MHz Crystal NTSC Square Pixel 4xClk= 49.09MHz NTSC 601 4xClk= 54.00MHz NTSC 4fsc 4xClk= 57.27MHz PAL Square Pixel 4xClk= 59.00MHz PAL ...
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H Start Field 1 262 263 264 265 266 267 268 Start of H/2 Field 2 VBLANK Lines Pin 24 FRESET ½ Line Pin 22 FIELDID ...
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ML6430/ML6431 FUNCTIONAL DESCRIPTION FREERUN MODE Both the ML6430 and ML6431 can be used in Freerun mode. The ML6431 is recommended for applications requiring a more robust Freerun mode of operations. Figure 4 and Figure 4a describe the state diagrams for ...
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FUNCTIONAL DESCRIPTION Locked (ML6431): The ML6431 must be line (horizontal) locked to an input video source for at least two fields and also be vertically locked before the locked detect signal goes high. When a video source is removed, the ...
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Resolution # Pixels Refresh Horizontal Pixel per Line Rate Frequency Frequency 640 x 480 800 60 Hz 31.5 KHz 25.175 MHz 832 72 Hz 37.9 KHz 31.500 MHz 840 75 Hz 37.5 KHz 31.500 MHz 800 x 600 1024 56 ...
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FUNCTIONAL DESCRIPTION PRESET PIN CONTROL The ML6430/ML6431 may be controlled via a set of four preset mode pins. These pins do not allow access to all the programmable features of the ML6430/ML6431, but are intended to provide a simpler interface ...
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ML6430/ML6431 FUNCTIONAL DESCRIPTION CONTROL REGISTER INFORMATION REGISTER PulsePol[2:0] Clk4X Pixel[10:0] Determined by PRESET pin Burst CSyncRaw RawClamp TTL Sync WideBlank HDelay[6:0] Noise Gating Test 3,1,4 External 54 Clock IN FAud[1:0] VCR SLEEP Thresh[1:0] VGA Determined by PRESET pin Div4 Determined ...
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FUNCTIONAL DESCRIPTION Audio Clock: The Ml6430/ML6431 outputs a clock at 32kHz, 44.1kHz, or 48kHz. This clock is locked in frequency to the basic video clock regardless of the standard being used. With VCR head switches, the phase correction required to ...
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ML6430/ML6431 REGISTER DATA DESCRIPTION BIT 0 0 PulsePol 0 C SYNC 0 1 PulsePol 1 H/V Blank Polarity 0 2 PulsePol 2 S/B Clamp Polarity 0 3 Clk 4X Select 4X Clock 1 0 Pixel0 Pix Counter Load Bit 0 ...
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REGISTER DATA DESCRIPTION BIT 7 0 Test 3 For test mode only: No user programmable features 7 1 Test 1 For test mode only: No user programmable features 7 2 Ext 54 Clock Test 4 For test ...
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ML6430/ML6431 REGISTER DATA DESCRIPTION BIT 0 0 PulsePol 0 C SYNC 0 1 PulsePol 1 H/V Blank Polarity 0 2 PulsePol 2 S/B Clamp Polarity 0 3 Clk 4X Select 4X Clock 1 0 Pixel0 Pix Counter Load Bit 0 ...
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REGISTER DATA DESCRIPTION BIT 7 0 DisAutoVCR 7 1 Test 1 For test mode only: No user programmable features. Set Ext 54 Clock PHERROUT or AUDIOCLK 8 0 FAud0 AudioClk Freq Bit 0 ...
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ML6430/ML6431 FUNCTIONAL DESCRIPTION SERIAL BUS OPERATION The serial bus control in the ML6430/ML6431 has two levels of addressing: Device Addressing and Register Addressing. Device Addressing: Figure 5 shows the physical waveforms generated in order to address the ML6430/ ML6431. There ...
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S DATA ‘1’ ‘0’ ‘1’ ‘1’ ‘0’ DEVICE ADDR = ‘B2’ S CLK Address decode strobed on 9th clock CLK [Data is ‘don’t care’ during strobe ‘1011 0010’ shifted on ...
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ML6430/ML6431 APPLICATIONS The ML6430 and ML6431 can be used for a variety of applications. The following figures provide a basic setup for the various applications listed below: Figure 9: ML6430 or ML6431 in NTSC CCIR Applications Figure 10: ML6430 or ...
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MHz XTAL or open for 4.43 MHz XTAL P2/S DATA 5V P3/S CLK SLEEP/54MHz 0.1 F 0.001 F GND VIN SYNC CV REF 1 SYNC CV ...
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ML6430/ML6431 5V SLEEP/54MHz +5V 0.1 F 0.001 F C VIN 1 Note 1. For minimum V *PHERROUT is only available with the ML6431 Figure 10. ML6430/ML6431 in PAL CCIR Applications Programmed via Preset Pins ...
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S DATA P2/S DATA S CLK P3/S CLK SLEEP/54MHz 0.1 F 0.001 F GND VIN SYNC H SYNC REF 1 SYNC Note 1. For minimum V *PHERROUT is ...
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ML6430/ML6431 S DATA P2/S S CLK SLEEP/54MHz 5V 0.1 F 0.001 F C VIN 1 Note 1. For minimum V Note 2. See Table 4 for audio clock frequencies and registers *PHERROUT is only ...
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See Table 7 for Available Standards P2/S P3/S SLEEP/54MHz 5V 0.1 F 0.001 F GND VIN 1 1 INPUT NEEDED 75 Note 1. For minimum V Note 2. See Table 4 ...
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ML6430/ML6431 NTSC AT SQUARE PIXEL RATE SYMBOL NAME: CCIR 601STD DESCRIPTION N Clocks per H: 640 HA Active N Clocks per H: 780 H Whole Line N H per Frame: 486 VA Active N H per Frame: 525 V Whole ...
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NTSC RATE SYMBOL NAME: CCIR 601STD DESCRIPTION N Clocks per H: 768 HA Active N Clocks per H: 910 H Whole Line N H per Frame: 486 VA Active N H per Frame: 525 V Whole ...
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ML6430/ML6431 NTSC AT CCIR601 RATE SYMBOL NAME: CCIR 601STD DESCRIPTION N Clocks per H: 720 HA Active N Clocks per H: 858 H Whole Line N H per Frame: 486 VA Active N H per Frame: 525 V Whole Line ...
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... BSC (0.8 BSC) ORDERING INFORMATION PART NUMBER ML6430CH ML6431CH (EOL) © Micro Linear 2000. property of their respective owners. Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; ...