ML6431CH MICRO-LINEAR [Micro Linear Corporation], ML6431CH Datasheet - Page 22

• Manufacturer Part Number: ML6431CH
• Description: Genlocking Sync Generator with Digital Audio Clock for NTSC, PAL & VGA
• Manufacturer: MICRO-LINEAR [Micro Linear Corporation]

ML6430/ML6431
FUNCTIONAL DESCRIPTION
SERIAL BUS OPERATION
The serial bus control in the ML6430/ML6431 has two
levels of addressing: Device Addressing and Register
Addressing.
Device Addressing: Figure 5 shows the physical
waveforms generated in order to address the ML6430/
ML6431. There are six basic parts of the waveform:
1. Start Indication: Clock Cycle 0
2. Device Address Shifted: Clock Cycle 1 through 8
3. Device Address Strobed and Decoded: Clock Cycle 9
22
S
S
START: A Falling Edge on the S
STOP: A Rising Edge on the S
S
S
DATA
CLK
DATA
CLK
t
SET/START
0
MSB
START
A7
1
t
RISE
DATA
A6
2
DATA
S
S
S
S
S
S
S
S
CLK
CLK
DATA
CLK
CLK
DATA
CLK
DATA
While S
While S
:
:
:
:
:
:
:
;
Figure 5. Definition of START & STOP on Serial Data Bus
Figure 6. Definition of DATA FORMAT on Serial Data Bus
9th pulse strobes address decoder
Rising edge enables data transfer
Value set to A6, Device Address (MSB-1)
Falling edge disables data transfer
Rising edge enables data transfer
Value set to A7, Device Address MSB
Falling edge in prep for first address transfer
Falling edge with S
CLK
CLK
A1
7
is Held High
is Held High
All Other S
A0
8
(Continued)
CLK
DATA
Hi means start of sequence
9
Transitions Must Occur While S
4. Data Shifted : Clock Cycle 10 through 17
5. Data Strobed into Appropriate Register: Clock Cycle 18
6. Stop indication: Clock Cycle 19
Register Addressing: Figure 6 shows the register map of
the ML6430/6431. There are two basic parts of each
received data byte: Address Nibble and Data Nibble
10
MSB
D7
1. Address Nibble: The upper 4 bits of the data byte
2. Data Nibble: The lower 4 bits of the data byte is
gives the register number in which to place the
data.
the data to be placed in the currently addressed
register nibble.
D6
11
CLK
is Low
D1
16
S
S
S
S
S
S
S
S
DATA
DATA
CLK
CLK
DATA
CLK
CLK
DATA
:
:
:
:
17
D0
t
:
:
:
:
FALL
Rising edge with S
Value set low in prep for STOP
18th pulse strobes data shift register
Rising edge enables data transfer
Value set to D6, Data MSB-1
Falling edge disables data transfer
Rising edge enables data transfer
Value set to D7, Data MSB
18
STOP
CLK
Hi = STOP
STOP