74ACTQ16374_05 FAIRCHILD [Fairchild Semiconductor], 74ACTQ16374_05 Datasheet - Page 5

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74ACTQ16374_05

Manufacturer Part Number
74ACTQ16374_05
Description
16-Bit D-Type Flip-Flop with 3-STATE Outputs
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
C
C
t
t
t
t
t
t
t
(Note 12)
t
(Note 12)
t
(Note 12)
PLH
PHL
PZH
PZL
PHZ
PLZ
OSHL
OSLH
OST
Extended AC Electrical Characteristics
Note 10: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 11: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 12: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (t
to-LOW (t
Note 13: 3-STATE delays are load dominated and have been excluded from the datasheet.
Note 14: The Output Disable Time is dominated by the RC network (500
Capacitance
IN
PD
Symbol
Symbol
OST
).
Propagation Delay
Data to Output
Output Enable Time
Output Disable Time
Pin to Pin Skew
HL Data to Output
Pin to Pin Skew
LH Data to Output
Pin to Pin Skew
LH/HL Data to Output
Input Capacitance
Power Dissipation Capacitance
Parameter
Parameter
OSHL
Min
4.7
4.6
3.5
3.8
3.4
3.1
), LOW-to-HIGH (t
:
, 250 pF) on the output and has been excluded from the datasheet.
16 Outputs Switching
T
5
A
Typ
4.5
30
C

(Note 10)
40
L
Typ
q
C to
50 pF
OSLH

85
), or any combination switching LOW-to-HIGH and/or HIGH-
q
Units
C
pF
pF
Max
13.3
11.4
10.4
10.9
8.5
8.1
1.3
2.1
4.0
V
V
CC
CC
T
A
Min
6.6
6.4
5.0V
5.0V
C

(Note 11)
L
(Note 13)
(Note 14)
40
q
250 pF
C to
Conditions
www.fairchildsemi.com

Max
16.3
15.5
85
q
C
Units
ns
ns
ns
ns
ns
ns

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