M34D64-R STMICROELECTRONICS [STMicroelectronics], M34D64-R Datasheet

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M34D64-R

Manufacturer Part Number
M34D64-R
Description
64 Kbit Serial I2C Bus EEPROM With Hardware Write Control on Top Quarter of Memory
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
FEATURES SUMMARY
April 2003
Two Wire I
Supports 400 kHz Protocol
Single Supply Voltage:
– 2.5V to 5.5V for M34D64-W
– 1.8V to 5.5V for M34D64-R
Hardware Write Control of the top quarter of
memory
BYTE and PAGE WRITE (up to 32 Bytes)
RANDOM and SEQUENTIAL READ Modes
Self-Timed Programming Cycle
Automatic Address Incrementing
Enhanced ESD/Latch-Up Behavior
More than 1M Erase/Write Cycles
More than 40 Year Data Retention
With Hardware Write Control on Top Quarter of Memory
2
C Serial Interface
64 Kbit Serial I²C Bus EEPROM
Figure 1. Packages
TSSOP8 (DW)
150 mil width
169 mil width
8
SO8 (MN)
1
M34D64
1/21

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M34D64-R Summary of contents

Page 1

... Two Wire I C Serial Interface Supports 400 kHz Protocol Single Supply Voltage: – 2.5V to 5.5V for M34D64-W – 1.8V to 5.5V for M34D64-R Hardware Write Control of the top quarter of memory BYTE and PAGE WRITE ( Bytes) RANDOM and SEQUENTIAL READ Modes Self-Timed Programming Cycle Automatic Address Incrementing ...

Page 2

... Note: 1. See page 17 (onwards) for package dimensions, and how to identify pin-1. Chip Enable Serial Data Serial Clock Write Control Supply Voltage Ground Lock-Out Write Protect CC has reached the POR CC drops from the operating CC M34D64 SCL V SS ...

Page 3

... Figure 4. Memory Map showing Write Control Area . (Fig establish the 100kHz fc = 400kHz 100 C BUS (pF disable (WC=V ) write instructions 1FFFh Write Controlled Area 1800h 1000h 0800h 0000h 2 ) for Bus BUS SDA MASTER SCL C BUS 1000 M34D64 , and IL AI03114C BUS AI01665 3/21 ...

Page 4

... M34D64 2 Figure Bus Protocol SCL SDA START Condition SCL MSB SDA START Condition 1 SCL MSB SDA Table 2. Device Select Code b7 Device Select Code 1 Note: 1. The most significant bit, b7, is sent first. 2. E0, E1 and E2 are compared against the respective external pins on the memory device. ...

Page 5

... A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization. The M34D64 device is always a slave in all communication. Start Condition Start is identified by a falling edge of Serial Data (SDA) while Serial Clock (SCL) is stable in the High state ...

Page 6

... M34D64 Figure 7. Write Mode Sequences with WC=0 (data write enabled) WC BYTE WRITE WC PAGE WRITE WC (cont'd) PAGE WRITE (cont'd) Write Operations Following a Start condition the bus master sends a Device Select Code with the RW bit reset to 0. The device acknowledges this, as shown in Figure 7, and waits for two address bytes. The device re- sponds to each address byte with an acknowledge bit, and then waits for the data byte(s) ...

Page 7

... Ack, indicating that the device is ready to receive the second part of the instruction (the first byte of this instruction having been sent during Step 1). Send Address and Receive ACK START YES Condition DEVICE SELECT with Continue the Random READ Operation M34D64 AI01847C 7/21 ...

Page 8

... M34D64 Figure 9. Read Mode Sequences CURRENT ADDRESS DEV SEL READ RANDOM ADDRESS DEV SEL * READ SEQUENTIAL CURRENT DEV SEL READ SEQUENTIAL RANDOM DEV SEL * READ ACK Note: 1. The seven most significant bits of the Device Select Code of a Random Read (in the 1 Read Operations Read operations are performed independently of the state of the Write Control (WC) signal ...

Page 9

... For all Read commands, the device waits, after each byte read, for an acknowledgment during the th 9 bit time. If the bus master does not drive Serial Data (SDA) Low during this time, the device terminates the data transfer and switches to its Stand-by mode. from consecutive M34D64 9/21 ...

Page 10

... M34D64 MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings" table may cause per- manent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not im- Table 6 ...

Page 11

... Measure- Table 7. Operating Conditions (M34D64-W) Symbol V Supply Voltage CC T Ambient Operating Temperature A Table 8. Operating Conditions (M34D64-R) Symbol V Supply Voltage CC T Ambient Operating Temperature A ment Conditions summarized in the relevant tables. Designers should check that the operating ...

Page 12

... M34D64 Table 9. AC Measurement Conditions Symbol C Load Capacitance L Input Rise and Fall Times Input Levels Input and Output Timing Reference Levels Figure 10. AC Measurement I/O Waveform Table 10. Input Parameters Symbol Parameter C Input Capacitance (SDA Input Capacitance (other pins Input Impedance ...

Page 13

... Stand-by Supply Current CC1 Input Low Voltage (E2, E1, E0, SCL, SDA Input Low Voltage (WC) Input High Voltage V IH (E2, E1, E0, SCL, SDA, WC) V Output Low Voltage OL Table 12. DC Characteristics (M34D64-R) Symbol Parameter Input Leakage Current I LI (SCL, SDA) I Output Leakage Current LO I Supply Current CC I ...

Page 14

... M34D64 Table 13. AC Characteristics (M34D64-W) Symbol Alt Clock Frequency C SCL t t Clock Pulse Width High CHCL HIGH t t Clock Pulse Width Low CLCH LOW t t Clock Rise Time CH1CH2 Clock Fall Time CL1CL2 SDA Rise Time t R DH1DH2 ...

Page 15

... Table 14. AC Characteristics (M34D64-R) Symbol Alt Clock Frequency C SCL t t Clock Pulse Width High CHCL HIGH t t Clock Pulse Width Low CLCH LOW SDA Fall Time F DL1DL2 t t Data In Set Up Time DXCX SU:DAT t t Data In Hold Time CLDX HD:DAT ...

Page 16

... M34D64 Figure 11. AC Waveforms tCHCL SCL SDA In tCHDX START Condition SCL SDA In tCHDH STOP Condition SCL tCLQV SDA Out 16/21 tCLCH tDLCL tCLDX tDXCX SDA Change SDA Input tW Write Cycle tCLQX Data Valid tCHDH tDHDL STOP START Condition Condition tCHDX START Condition ...

Page 17

... Min. Max. 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 – – 5.80 6.20 0.25 0.50 0.40 0.90 0° 8° 45˚ inches Typ. Min. 0.053 0.004 0.013 0.007 0.189 0.150 0.050 – 0.228 0.010 0.016 0° 8 M34D64 Max. 0.069 0.010 0.020 0.010 0.197 0.157 – 0.244 0.020 0.035 8° 0.004 17/21 ...

Page 18

... M34D64 TSSOP8 – 8 lead Thin Shrink Small Outline, Package Outline A CP Notes: 1. Drawing is not to scale. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Mechanical Data Symbol Typ 1.000 3.000 e 0.650 E 6.400 E1 4.400 L 0.600 L1 1.000 18/ ...

Page 19

... T = Tape & Reel Packing Devices are shipped from the factory with the memory content set at all 1s (FFh). M34D64 – For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST Sales Of- fice. M34D64 T 19/21 ...

Page 20

... M34D64 REVISION HISTORY Table 16. Document Revision History Date Rev. 23-Mar-1999 1.0 Document written 09-Jun-1999 1.1 Memory Map illustration added. Line removed from Tab-2 M34D32 removed; PSDIP8 package removed; 4.5 to 5.5V and 1.8 to 3.6V ranges removed; 0 16-Nov-2000 1.2 to 70°C and -20 to 85°C ranges removed 13-Sep-2002 2.0 New edition. TSSOP8 package added Addresses on Memory Map figure corrected ...

Page 21

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