HYB39S16160AT-10 SIEMENS [Siemens Semiconductor Group], HYB39S16160AT-10 Datasheet - Page 4

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HYB39S16160AT-10

Manufacturer Part Number
HYB39S16160AT-10
Description
16 MBit Synchronous DRAM
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Signal Pin Description
Pin
CLK
CKE
CS
RAS
CAS
WE
A0 - A10
A11 (BS)
DQx
Semiconductor Group
Type
Input
Input
Input
Input
Input
Input
Input
Output
Signal Polarity Function
Pulse
Level
Pulse
Pulse
Level
Level
Level
Positive
Edge
Active
High
Active
Low
Active
Low
The system clock input. All of the SDRAM inputs are
sampled on the rising edge of the clock.
Activates the CLK signal when high and deactivates the
CLK signal when low, thereby initiates either the Power
Down mode, Suspend mode or the Self Refresh mode.
CS enables the command decoder when low and disables
the command decoder when high. When the command
decoder is disabled, new commands are ignored but
previous operations continue.
When sampled at the positive rising edge of the clock,
CAS, RAS and WE define the command to be executed by
the SDRAM.
During a Bank Activate command cycle, A0 - A10 defines
the row address (RA0 - RA10) when sampled at the rising
clock edge.
During a Read or Write command cycle, A0 - A9 defines
the column address (CA0 - CAn) when sampled at the
rising clock edge. CAn depends from the SDRAM
organisation.
4M
2M
1M
In addition to the column address, A10 is used to invoke
autoprecharge operation at the end of the burst read or
write cycle. If A10 is high, autoprecharge is selected and
A11 defines the bank to be precharged (low = bank A,
high = bank B). If A10 is low, autoprecharge is disabled.
During a Precharge command cycle, A10 is used in
conjunction with A11 to control which bank(s) to
precharge. If A10 is high, both bank A and bank B will be
precharged regardless of the state of A11. If A10 is low,
then A11 is used to define which bank to precharge.
Selects which bank is to be active. A11 low selects bank A
and A11 high selects bank B.
Data Input/Output pins operate in the same manner as on
conventional DRAMs.
4 SDRAM CAn = CA9
8 SDRAM CAn = CA8
16 SDRAM CAn = CA7
4
HYB 39S16400/800/160AT-8/-10
16 MBit Synchronous DRAM
1998-10-01

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