AT45DB321C-RI ATMEL [ATMEL Corporation], AT45DB321C-RI Datasheet - Page 5

• Manufacturer Part Number: AT45DB321C-RI
• Description: 32 MEGABIT 2.7 VOLT DATAFLASH
• Manufacturer: ATMEL [ATMEL Corporation]

Program and Erase
Commands
3387B–DFLSH–9/04
BUFFER WRITE: Data can be clocked in from the SI pin into either buffer 1 or buffer 2.
To load data into either buffer, a 1-byte opcode, 84H for buffer 1 or 87H for buffer 2,
must be clocked into the device, followed by three address bytes comprised of 14 don’t
care bits and 10 buffer address bits (BFA9-BFA0). The 10 buffer address bits specify
the first byte in the buffer to be written. After the last address byte has been clocked into
the device, data can then be clocked in on subsequent clock cycles. If the end of the
data buffer is reached, the device will wrap around back to the beginning of the buffer.
Data will continue to be loaded into the buffer until a low-to-high transition is detected on
the CS pin.
BUFFER TO MAIN MEMORY PAGE PROGRAM WITH BUILT-IN ERASE: Data written
into either buffer 1 or buffer 2 can be programmed into the main memory. To start the
operation, an 8-bit opcode, 83H for buffer 1 or 86H for buffer 2, must be clocked into the
device followed by three address bytes consisting of one reserved bit, 13 page address
bits (PA12-PA0) that specify the page in the main memory to be written and 10 don’t
care bits. When a low-to-high transition occurs on the CS pin, the part will first erase the
selected page in main memory (the erased state is a logic 1) and then program the data
stored in the buffer into the specified page in main memory. Both the erase and the pro-
gramming of the page are internally self-timed and should take place in a maximum time
of t
part is busy.
BUFFER TO MAIN MEMORY PAGE PROGRAM WITHOUT BUILT-IN ERASE: A previ-
ously-erased page within main memory can be programmed with the contents of either
buffer 1 or buffer 2. To start the operation, an 8-bit opcode, 88H for buffer 1 or 89H for
buffer 2, must be clocked into the device followed by three address bytes consisting of
one reserved bit, 13 page address bits (PA12-PA0) that specify the page in the main
memory to be written and 10 don’t care bits. When a low-to-high transition occurs on the
CS pin, the part will program the data stored in the buffer into the specified page in the
main memory. It is necessary that the page in main memory that is being programmed
has been previously erased using one of the erase commands (Page Erase or Block
Erase). The programming of the page is internally self-timed and should take place in a
maximum time of t
cate that the part is busy.
PAGE ERASE: The Page Erase command can be used to individually erase any page
in the main memory array allowing the Buffer to Main Memory Page Program without
Built-in Erase command to be utilized at a later time. To perform a page erase, an
opcode of 81H must be loaded into the device, followed by three address bytes com-
prised of one reserved bit, 13 page address bits (PA12-PA0) that specify the page in the
main memory to be erased and 10 don’t care bits. When a low-to-high transition occurs
on the CS pin, the part will erase the selected page (the erased state is a logic 1). The
erase operation is internally self-timed and should take place in a maximum time of t
During this time, the status register and the RDY/BUSY pin will indicate that the part is
busy.
BLOCK ERASE: A block of eight pages can be erased at one time. This command is
useful when large amounts of data has to be written into the device. This will avoid using
multiple Page Erase Commands. To perform a block erase, an opcode of 50H must be
loaded into the device, followed by three address bytes comprised of one reserved bit,
10 page address bits (PA12-PA3) and 13 don’t care bits. The 10 page address bits are
used to specify which block of eight pages is to be erased. When a low-to-high transition
occurs on the CS pin, the part will erase the selected block of eight pages. The erase
operation is internally self-timed and should take place in a maximum time of t
this time, the status register and the RDY/BUSY pin will indicate that the part is busy.
EP
. During this time, the status register and the RDY/BUSY pin will indicate that the
P
. During this time, the status register and the RDY/BUSY pin will indi-
AT45DB321C [Preliminary]
BE
. During
PE
5
.