STK10C48-NF25 SIMTEK [Simtek Corporation], STK10C48-NF25 Datasheet

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STK10C48-NF25

Manufacturer Part Number
STK10C48-NF25
Description
Manufacturer
SIMTEK [Simtek Corporation]
Datasheet
BLOCK DIAGRAM
FEATURES
• 25ns, 35ns and 45ns Access Times
• STORE to Nonvolatile Elements Initiated by
• RECALL to SRAM Initiated by Hardware or
• Automatic STORE Timing
• 10mA Typical I
• Unlimited READ, WRITE and RECALL Cycles
• 1,000,000 STORE Cycles to Nonvolatile Ele-
• 100-Year Data Retention over Full Industrial
• Commercial and Industrial Temperatures
• 28-Pin 300 mil PDIP, 300 mil SOIC and
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
March 2006
A
A
A
A
A
Hardware
Power Restore
ments
Temperature Range
350 mil SOIC Packages
5
6
7
8
9
0
1
2
3
4
5
6
7
CC
at 200ns Cycle Time
A
0
COLUMN DEC
STATIC RAM
COLUMN I/O
A
32 x 512
1
ARRAY
A
2
A
3
A
Obsolete - Not Recommend for new Designs
Quantum Trap
4
A
32 x 512
10
RECALL
STORE
1
DESCRIPTION
The Simtek STK10C48 is a fast static
volatile element incorporated in each static memory
cell. The
number of times, while independent nonvolatile data
resides in
be transferred from the
ments (the
Elements to the
the NE pin. Transfers from the Nonvolatile Elements to
the
matically on restoration of power. The STK10C48
combines the high performance and ease of use of a
fast
The STK10C48 features industry-standard pinout for
nonvolatile
SRAM
Nonvolatile Static RAM
SRAM
QuantumTrap™ CMOS
Document Control # ML0002 rev 0.2
CONTROL
RECALL
STORE/
SRAM
(the
with nonvolatile data integrity.
t
he Nonvolatile Elements. Data may easily
RAM
STORE
RECALL
G
NE
E
W
s.
can be read and written an unlimited
SRAM
operation), or from the Nonvolatile
2K x 8 nvSRAM
PIN CONFIGURATIONS
PIN NAMES
DQ
DQ
DQ
V
NC
NE
A
A
A
A
A
A
A
A
SS
operation) also take place auto-
2
STK10C48
7
6
5
4
3
1
0
(the
0
2
1
A
W
DQ
E
G
NE
V
V
SRAM
0
CC
SS
- A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
0
- DQ
10
RECALL
7
to the Nonvolatile Ele-
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DQ
DQ
V
A
A
NC
G
A
E
DQ
DQ
DQ
W
NC
Address Inputs
Write Enable
Data In/Out
Chip Enable
Output Enable
Nonvolatile Enable
Power (+ 5V)
Ground
operation), using
CC
8
9
10
RAM
7
6
5
4
3
28 - 300 PDIP
28 - 300 SOIC
28 - 350 SOIC
with a non-

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STK10C48-NF25 Summary of contents

Page 1

... March 2006 QuantumTrap™ CMOS Nonvolatile Static RAM Obsolete - Not Recommend for new Designs DESCRIPTION The Simtek STK10C48 is a fast static volatile element incorporated in each static memory cell. The number of times, while independent nonvolatile data resides in be transferred from the ments (the Elements to the the NE pin ...

Page 2

... STK10C48 ABSOLUTE MAXIMUM RATINGS Voltage on Input Relative to Ground . . . . . . . . . . . . . .–0.5V to 7.0V Voltage on Input Relative –0. Voltage –0. 0-7 Temperature under Bias . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W DC Output Current (1 output at a time, 1s duration 15mA ...

Page 3

... AXQX AVAV 1 t ELQV 6 t ELQX 4 t GLQV 8 t GLQX 10 t ELICCH ACTIVE 3 Document Control # ML0002 rev 0.2 STK10C48 ± 5.0V CC STK10C48-25 STK10C48-35 STK10C48-45 MIN MAX MIN MAX MIN MAX ...

Page 4

... WLQZ HIGH IMPEDANCE AVAV 14 t ELEH 17 t AVEH 13 t WLEH 15 t DVEH DATA VALID HIGH IMPEDANCE 4 Document Control # ML0002 rev 0.2 ± 5.0V 10%) CC STK10C48-35 STK10C48-45 UNITS MAX MIN MAX MIN MAX ...

Page 5

... Output Disable Set- Fall NE Set-up Chip Enable Set-up Write Enable Set- NLWL WLNH NLEL 28 t WLEL 23 t ELNH 5 Document Control # ML0002 rev 0.2 STK10C48 MODE POWER Standby Active Active k Active Active . RESTORE (V = 5.0V CC MIN MAX ...

Page 6

... BROWN OUT BROWN OUT STORE INHIBIT STORE INHIBIT NO RECALL NO RECALL DID NOT GO (V DID NOT BELOW V ) BELOW V RESET RESET 6 Document Control # ML0002 rev 0 5.0V + 10%) CC STK10C48 UNITS NOTES MIN MAX μs 550 10 ms 4.0 4.5 V 3.6 V BROWN OUT STORE INHIBIT RECALL WHEN V RETURNS CC ) ABOVE V ...

Page 7

... NLQZ NLEL 36 t GLEL WHEL ELNH NLGL 34 t GLNH 37 t WHGL 38 ELGL 7 Document Control # ML0002 rev 0.2 STK10C48 ± 5.0V 10%) CC MIN MAX UNITS 550 33 t NLQX HIGH IMPEDANCE 33 t ELQX 33 t GLQX μ ...

Page 8

... Nonvolatile Elements or from Nonvolatile SRAM Elements to . SRAM NOISE CONSIDERATIONS Note that the STK10C48 is a high-speed memory and so must have a high-frequency bypass capaci- tor of approximately 0.1μF connected between V and V , using leads and traces that are as short as SS possible. As with all high-speed careful routing of power, ground and signals will help prevent noise problems ...

Page 9

... To help avoid this situation, a 10K Ohm resistor should be connected either between W and system V or between E and system V CC HARDWARE PROTECT The STK10C48 offers two levels of protection to suppress inadvertent cycles. If the control STORE signals ( and NE) remain in the dition at the end of a cycle, a second STORE cycle will not be started ...

Page 10

... STK10C48 STK10C48 March 2006 ORDERING INFORMATION - Temperature Range Access Time Lead Finish Package 10 Document Control # ML0002 rev 0.2 Blank = Commercial (0 to 70° Industrial (–40 to 85° 25ns 35 = 35ns 45 = 45ns Blank = 85%Sn/15% 100% Sn (Matte Tin Plastic 28-pin 300 mil DIP N = Plastic 28-pin 300 mil SOIC ...

Page 11

... Document Revision History Date Revision December 2002 0.0 September 2003 0.1 March 2006 0.2 March 2006 Summary Removed 20 nsec device. Added lead-free lead finish Marked as Obsolete, Not recommended for new design. 11 Document Control # ML0002 rev 0.2 STK10C48 ...

Page 12

... STK10C48 March 2006 12 Document Control # ML0002 rev 0.2 ...

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