ATxmega128D4-AU ATMEL [ATMEL Corporation], ATxmega128D4-AU Datasheet - Page 12
ATxmega128D4-AU
Manufacturer Part Number
ATxmega128D4-AU
Description
8/16-bit Atmel XMEGA D4 Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATXMEGA128D4-AU.pdf
(136 pages)
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7. Memories
7.1
7.2
8135L–AVR–06/12
Features
Overview
•
•
•
•
The Atmel AVR architecture has two main memory spaces, the program memory and the data
memory. Executable code can reside only in the program memory, while data can be stored in
the program memory and the data memory. The data memory includes the internal SRAM, and
EEPROM for nonvolatile data storage. All memory spaces are linear and require no memory
bank switching. Nonvolatile memory (NVM) spaces can be locked for further write and read/write
operations. This prevents unrestricted access to the application software.
A separate memory section contains the fuse bytes. These are used for configuring important
system functions, and can only be written by an external programmer.
The available memory size configurations are shown in
addition, each device has a Flash memory signature row for calibration data, device identifica-
tion, serial number etc.
Flash program memory
Data memory
Production signature row memory for factory programmed data
User signature row
– One linear address space
– In-system programmable
– Self-programming and boot loader support
– Application section for application code
– Application table section for application code or data storage
– Boot section for application code or boot loader code
– Separate read/write protection lock bits for all sections
– Built in fast CRC check of a selectable flash program memory section
– One linear address space
– Single-cycle access from CPU
– SRAM
– EEPROM
– I/O memory
– ID for each microcontroller device type
– Serial number for each device
– Calibration bytes for factory calibrated peripherals
– One flash page in size
– Can be read and written from software
– Content is kept after chip erase
Byte and page accessible
Optional memory mapping for direct load and store
Configuration and status registers for all peripherals and modules
16 bit-accessible general purpose registers for global variables or flags
”Ordering Information” on page 2
XMEGA D4
12
In
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