ATxmega128D4-AU ATMEL [ATMEL Corporation], ATxmega128D4-AU Datasheet - Page 15
ATxmega128D4-AU
Manufacturer Part Number
ATxmega128D4-AU
Description
8/16-bit Atmel XMEGA D4 Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATXMEGA128D4-AU.pdf
(136 pages)
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7.5
Figure 7-2.
7.6
7.7
8135L–AVR–06/12
Byte address
Data Memory
EEPROM
I/O Memory
2FFF
17FF
1000
2000
FFF
Data memory map (Hexadecimal address).
0
ATxmega64D4
Internal SRAM
I/O Registers
RESERVED
EEPROM
(4K)
(2K)
(4K)
The data memory contains the I/O memory, internal SRAM, optionally memory mapped
EEPROM, and external memory if available. The data memory is organized as one continuous
memory section, see
will always have the same start addresses for all Atmel AVR XMEGA devices.
All devices have EEPROM for nonvolatile data storage. It is either addressable in a separate
data space (default) or memory mapped and accessed in normal data space. The EEPROM
supports both byte and page access. Memory mapped EEPROM allows highly efficient
EEPROM reading and EEPROM buffer loading. When doing this, EEPROM is accessible using
load and store instructions. Memory mapped EEPROM will always start at hexadecimal address
0x1000.
The status and configuration registers for peripherals and modules, including the CPU, are
addressable through I/O memory locations. All I/O locations can be accessed by the load
(LD/LDS/LDD) and store (ST/STS/STD) instructions, which are used to transfer data between
the 32 registers in the register file and the I/O memory. The IN and OUT instructions can
address I/O memory locations in the range of 0x00 to 0x3F directly. In the address range 0x00 -
0x1F, single-cycle instructions for manipulation and checking of individual bits are available.
Byte address
Figure
2FFF
13FF
1000
2000
FFF
7-2. To simplify development, I/O Memory, EEPROM and SRAM
0
ATxmega32D4
Internal SRAM
I/O Registers
RESERVED
EEPROM
(4K)
(1K)
(4K)
Byte address
Byte address
3FFF
17FF
1000
2000
13FF
27FF
FFF
1000
2000
FFF
0
0
XMEGA D4
ATxmega128D4
Internal SRAM
ATxmega16D4
Internal SRAM
I/O Registers
I/O Registers
RESERVED
EEPROM
RESERVED
EEPROM
(4K)
(2K)
(8K)
(4K)
(1K)
(2K)
15
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