ATXMEGA256A3B_09 ATMEL [ATMEL Corporation], ATXMEGA256A3B_09 Datasheet - Page 14

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ATXMEGA256A3B_09

Manufacturer Part Number
ATXMEGA256A3B_09
Description
8/16-bit XMEGA A3B Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
7.8
8116F–AVR–09/09
ATxmega256A3B
ATxmega256A3B
Devices
Devices
Flash and EEPROM Page Size
256 KB + 8 KB
Flash Size
EEPROM
The Flash Program Memory and EEPROM data memory are organized in pages. The pages are
word accessible for the Flash and byte accessible for the EEPROM.
Table 7-2 on page 14
operations are performed on one page at a time, while reading the Flash is done one byte at a
time. For Flash access the Z-pointer (Z[m:n]) is used for addressing. The most significant bits in
the address (FPAGE) give the page number and the least significant address bits (FWORD)
give the word in the page.
Table 7-2.
Table 7-3 on page 14
EEPROM write and erase operations can be performed one page or one byte at a time, while
reading the EEPROM is done one byte at a time. For EEPROM access the NVM Address Regis-
ter (ADDR[m:n]) is used for addressing. The most significant bits in the address (E2PAGE) give
the page number and the least significant address bits (E2BYTE) give the byte in the page.
Table 7-3.
Size
4 KB
Page Size
(words)
256
Number of words and Pages in the Flash.
Number of Bytes and Pages in the EEPROM.
Page Size
FWORD
(Bytes)
Z[8:1]
shows the Flash Program Memory organization. Flash write and erase
32
shows EEPROM memory organization for the XMEGA A3B devices.
FPAGE
Z[18:9]
ADDR[4:0]
E2BYTE
256 KB
Size
Application
No of Pages
ADDR[11:5]
E2PAGE
512
XMEGA A3B
Size
8 KB
No of Pages
Boot
128
No of Pages
16
14

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