P80C652EBB PHILIPS [NXP Semiconductors], P80C652EBB Datasheet - Page 11

• Manufacturer Part Number: P80C652EBB
• Description: CMOS single-chip 8-bit microcontrollers
• Manufacturer: PHILIPS [NXP Semiconductors]

1. See Figures 9 through 11 for I
2. The operating supply current is measured with all output pins disconnected; XTAL1 driven with t
3. The idle mode supply current is measured with all output pins disconnected; XTAL1 driven with t
4. The power-down current is measured with all output pins disconnected; XTAL2 not connected; Port 0 = P1.6 = P1.7 = V
5. 2V
6. The input threshold voltage of P1.6 and P1.7 (SIO1) meets the I
7. Pins of ports 1 , 2, and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
8. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the V
9. Under steady state (non-transient) conditions, I
10. Capacitive loading on ports 0 and 2 may cause the V
11. I
Phlips Semiconductors
NOTES FOR DC ELECTRICAL CHARACTERISTICS:
1997 Dec 05
CMOS single-chip 8-bit microcontrollers
V
V
EA = RST = V
logic 0 while an input voltage above 0.7V
maximum value when V
to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify
ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input.
I
test conditions, V
address bits are stabilizing.
I
(mA)
OL
DDMAX
DD
IL
IH
40
30
20
10
= 26mA total for Port 0; Maximum I
= V
= V
0
V
0
(1) MAXIMUM OPERATING MODE: V
(2) MAXIMUM IDLE MODE: V
These values are valid within the specified
frequency range.
PD
SS
DD
for other frequencies can be derived from Figure 1, where FREQ is the external oscillator frequency in MHz. I
+ 0.5V; V
–0.5V; XTAL2 not connected; Port 0 = P1.6 = P1.7 = V
V
DD
SS
max.
. See Figure 11.
OL
IH
4
may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions.
= V
IN
DD
is approximately 2V.
–0.5V; XTAL2 not connected; EA = RST = Port 0 = P1.6 = P1.7 = V
DD
DD
= V
test conditions.
8
DDmax
DD
OL
= V
DD
= 15mA total for Ports 1, 2, and 3; Maximum I
DDmax
will be recognized as a logic 1.
OL
12
must be externally limited as follows: Maximum I
f
XTAL1
(1)
(2)
OH
Figure 1. I
on ALE and PSEN to momentarily fall below the 0.9V
(MHz)
16
2
C specification, so an input voltage below 0.3V
DD
DD
11
; EA = RST = V
vs. Frequency
I
(mA)
DD
40
30
20
10
50
0
0
(1) MAXIMUM OPERATING MODE: V
(2) MAXIMUM IDLE MODE: V
These values are valid within the specified
frequency range.
SS
. See Figure 10.
OL
4
= 71mA total for all output pins. If I
OL
s of ALE and ports 1 and 3. The noise is due
r
DD
r
= t
= t
. See Figure 9.
OL
f
f
= 5ns;
= 5ns; V
= 10mA per port pin; Maximum
8
DD
= V
DDmax
80C652/83C652
DD
IL
(1)
DD
(2)
= V
DD
= V
12
specification when the
SS
will be recognized as a
DDmax
DDMAX
+ 0.5V;
DD
Product specification
;
is given in mA.
16
OL
f
XTAL1
exceeds the
(MHz)
24