LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 210

• Manufacturer Part Number: LM3S6611-IQC20-A0T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

General-Purpose Timers
GPTM TimerB Mode (GPTMTBMR)
Timer0 base: 0x4003.0000
Timer1 base: 0x4003.1000
Timer2 base: 0x4003.2000
Timer3 base: 0x4003.3000
Offset 0x008
Type R/W, reset 0x0000.0000
210
Reset
Reset
Type
Type
Bit/Field
31:4
3
2
RO
RO
31
15
0
0
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008
This register configures the GPTM based on the configuration selected in the GPTMCFG register.
When in 16-bit PWM mode, set the TBAMS bit to 0x1, the TBCMR bit to 0x0, and the TBMR field to
0x2.
RO
RO
30
14
0
0
reserved
TBAMS
TBCMR
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
R/W
R/W
0
0
RO
RO
RO
26
10
0
0
reserved
Reset
0x00
0
0
RO
RO
25
0
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPTM TimerB Alternate Mode Select
The TBAMS values are defined as follows:
GPTM TimerB Capture Mode
The TBCMR values are defined as follows:
RO
RO
Value
Value
24
0
8
0
reserved
0
1
0
1
Description
Capture mode is enabled.
PWM mode is enabled.
Note:
Description
Edge-Count mode.
Edge-Time mode.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
To enable PWM mode, you must also clear the TBCMR
bit and set the TBMR field to 0x2.
RO
RO
21
0
5
0
RO
RO
20
0
4
0
TBAMS
R/W
RO
19
0
3
0
TBCMR
R/W
RO
18
0
2
0
October 09, 2007
R/W
RO
17
0
1
0
TBMR
R/W
RO
16
0
0
0