LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 279

• Manufacturer Part Number: LM3S6611-IQC20-A0T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

UART Raw Interrupt Status (UARTRIS)
UART0 base: 0x4000.C000
UART1 base: 0x4000.D000
UART2 base: 0x4000.E000
Offset 0x03C
Type RO, reset 0x0000.000F
October 09, 2007
Reset
Reset
Type
Type
Bit/Field
31:11
3:0
10
9
8
7
6
5
4
RO
RO
31
15
0
0
Register 11: UART Raw Interrupt Status (UARTRIS), offset 0x03C
The UARTRIS register is the raw interrupt status register. On a read, this register gives the current
raw status value of the corresponding interrupt. A write has no effect.
RO
RO
30
14
0
0
reserved
reserved
OERIS
BERIS
PERIS
RTRIS
RXRIS
FERIS
TXRIS
reserved
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
0
0
RO
RO
RO
RO
RO
RO
RO
RO
RO
OERIS
RO
RO
26
10
0
0
Reset
0x00
0xF
0
0
0
0
0
0
0
BERIS
RO
RO
25
0
9
0
Preliminary
PERIS
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
UART Overrun Error Raw Interrupt Status
Gives the raw interrupt state (prior to masking) of this interrupt.
UART Break Error Raw Interrupt Status
Gives the raw interrupt state (prior to masking) of this interrupt.
UART Parity Error Raw Interrupt Status
Gives the raw interrupt state (prior to masking) of this interrupt.
UART Framing Error Raw Interrupt Status
Gives the raw interrupt state (prior to masking) of this interrupt.
UART Receive Time-Out Raw Interrupt Status
Gives the raw interrupt state (prior to masking) of this interrupt.
UART Transmit Raw Interrupt Status
Gives the raw interrupt state (prior to masking) of this interrupt.
UART Receive Raw Interrupt Status
Gives the raw interrupt state (prior to masking) of this interrupt.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RO
RO
24
0
8
0
reserved
FERIS
RO
RO
23
0
7
0
RTRIS
RO
RO
22
0
6
0
TXRIS
RO
RO
21
0
5
0
RXRIS
RO
RO
20
0
4
0
LM3S6611 Microcontroller
RO
RO
19
0
3
1
RO
RO
18
0
2
1
reserved
RO
RO
17
0
1
1
RO
RO
16
0
0
1
279