ATA5811_06 ATMEL [ATMEL Corporation], ATA5811_06 Datasheet - Page 62

• Manufacturer Part Number: ATA5811_06
• Description: UHF ASK/FSK TRANSCEIVER
• Manufacturer: ATMEL [ATMEL Corporation]

Table 11-5.
11.3
62
Mode
TX
Interrupts
ATA5811/ATA5812
TX Modulation Schemes
ASK/_NFSK
0
1
Via pin IRQ, the transceiver signals different operating conditions to a connected microcontrol-
ler. If a specific operating condition occurs, pin IRQ is set to high level. If an interrupt occurs it is
recommended to delete the interrupt be immediately deleted by reading the status register, thus
the next possible interrupt doesn’t get lost. If the Interrupt pin doesn’t switch to low level by read-
ing the status register the interrupt was triggered by the RX/TX data buffer. In this case read or
write the RX/TX data buffer according to
Table 11-6.
Operating Conditions Which Sets Pin IRQ to
High Level
Events in Status Register
State transition of status bit STn
(0
Appearance of status bit Power_On
(0
Appearance of status bit P_On_Aux
(0
Events During TX Operation (T_MODE = 0)
4, 8 or 12 Bytes are in the TX data buffer or the
TX data buffer is empty (depends on IR0 and
IR1 in control register 1).
Events During RX Operation (T_MODE = 0)
4, 8 or 12 received bytes are in the RX data
buffer or a receiving error is occurred (depends
on IR0 and IR1 in control register 1).
Successful Bit-check (P_MODE = 0)
Note:
1; 1
1)
1)
P_Mode
1. During reading of the RX/TX buffer, no IRQ is issued, due to the received bytes or a receiving
0)
X
X
X
X
0
0
1
1
0
0
1
1
error.
Interrupt Handling
T_Mode
0
0
0
0
1
1
0
0
0
0
1
1
Bit in TX/RX
Data Buffer
Table
X
X
X
X
Operations Which Sets Pin IRQ to Low Level
Read status register or
Command Delete IRQ
Write TX data buffer or
Write control register 1 or
Write control register 4 or
Write control register 5 or
Write control register 6 or
Command delete IRQ
Read RX data buffer
Write control register 1 or
Write control register 4 or
Write control register 5 or
Write control register 6 or
Command delete IRQ
1
0
1
0
1
0
1
0
11-6.
Level on Pin
SDI_TMDI
X
X
X
X
X
X
X
X
1
0
1
0
(1)
or
f
f
ASK
ASK
f
f
FSK_L
FSK_H
off
on
f
f
f
f
RF
f
f
ASK
ASK
ASK
ASK
f
f
FSK_H
FSK_L
FSK_H
FSK_L
4689F–RKE–08/06
OUT
on
off
on
off
f
f
f
f
FSK_H
ASK
ASK
FSK_L
on
off