XR68C192 EXAR [Exar Corporation], XR68C192 Datasheet - Page 4

• Manufacturer Part Number: XR68C192
• Description: DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
• Manufacturer: EXAR [Exar Corporation]

XR68C92/192
SYMBOL DESCRIPTION (* 44 TQFP Package)
-DTACK
RX A/B
TX A/B
OP0
OP1
OP2
OP3
OP4
Symbol
Rev. P1.10
35,11
33,13
44
32
14
31
15
30
10
31,10
30,11
Pin
40
29
12
28
13
27
9
29,5
28,6
44*
27
26
25
7
8
4
Signal
type
O
O
O
O
O
O
O
I
Data transfer acknowledge (three-state active low output).
During Read, Write, or interrupt cycle goes low to indicate
proper transfer of data between the CPU and XR68C92/
192.
from serial port to XR68C92/192 receive input circuit. A
mark (high) is logic one and a space (low) is logic zero.
with additional start , stop and parity bits. The TX will be held
in mark (high) state during reset, local loop back mode or
when the transmitter is disabled.
Multi-purpose output. General purpose output or Channel A
Request-To-Send (-RTSA active low).
Multi-purpose output. General purpose output or Channel B
Request-To-Send (-RTSB active low).
Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Configuration Register bits 1,0:
TxAClk1 -Transmit 1X clock.
TxAClk16 -Transmit 16X clock
RxAClk1 -Receive 1X clock
Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Configuration Register bits 3,2:
C/T -Counter timer output (Open drain output)
TxBClk1 -Transmit 1X clock
RxBClk1 -Receive 1X clock
Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Configuration Register bit 4:
-RxARDY -Receive ready signal (Open drain output)
-RxAFULL - Receive FIFO full signal (Open drain output)
Serial data input. The serial information (data) received
Serial data output. The serial data is transmitted via this pin
4
Pin Description