XR17L154CV EXAR [Exar Corporation], XR17L154CV Datasheet - Page 13

• Manufacturer Part Number: XR17L154CV
• Description: 3.3V PCI BUS QUAD UART
• Manufacturer: EXAR [Exar Corporation]

XR17L154
3.3V PCI BUS QUAD UART
REV. 1.1.0
Registers INT3, INT2 and INT1 [32:8]
Twenty four bit encoded interrupt indicator. Each channel’s interrupt is encoded into 3 bits for receive, transmit,
and status. Bit [10:8] represent channel 0 and go up to channel 3 with bits [19:17]. The 3 bit encoding and their
priority order are shown below in
exist within channel 0 space and not in other channel interrupt.
.
F
P
IGURE
RIORITY
N + 2
Bit
x
1
2
3
4
5
6
7
R svd
N + 1
Bit
4. T
B
Bit
N
HE
IT
[
INT3 Register
0
0
0
0
1
1
1
1
N
G
N + 2
Bit
+2]
LOBAL
R svd
N + 1
Bit
B
IT
I
Bit
T
N
NTERRUPT
[
0
0
1
1
0
0
1
1
N
ABLE
+1]
N + 2
Bit
5: UART C
R svd
N + 1
B
Bit
Table 5
IT
0
1
0
1
0
1
0
1
[
R
N
EGISTER
Bit
]
N
None
RXRDY and RX Line Status (logic OR of LSR[4:1])
RXRDY Time-out
TXRDY, THR or TSR (auto RS485 mode) empty
MSR, RTS/CTS or DTR/DSR delta or Xoff/Xon det. or special char. detected
Reserved.
MPIO pin(s). Available only within channel 0, reserved in other channels.
TIMER Time-out. Available only within channel 0, reserved in other channels.
N + 2
. The Timer and MPIO interrupts are for the device and therefore they
Bit
HANNEL
R svd
INT0, IN T1, INT 2 and INT3
, INT0, INT1, INT2
N + 1
Bit
Interrup t Reg isters,
INT2 Register
Bit
N
[3:0] I
N + 2
Bit
13
C h an ne l-3
NTERRUPT
N + 1
Bit
Bit
N
AND
I
NTERRUPT
N + 2
Bit
S
C h an ne l-2
INT3
OURCE
R svd
N + 1
Bit-7
Bit
R svd R svd
Bit-6
Bit
N
S
E
OURCE
NCODING
Bit-5
N + 2
Bit
C h an ne l-1
INT0 Register
R svd
Bit-4
(
N + 1
INT1 Register
Bit
S
)
DISCONTINUED
C h -3 C h -2 C h -1 C h -0
Bit-3
Bit
N
N + 2
Bit-2
Bit
áç
áç
áç
áç
C h an ne l-0
N + 1
Bit-1
Bit
Bit-0
Bit
N