ISPPAC-POWR1014A LATTICE [Lattice Semiconductor], ISPPAC-POWR1014A Datasheet - Page 11

• Manufacturer Part Number: ISPPAC-POWR1014A
• Description: In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
• Manufacturer: LATTICE [Lattice Semiconductor]

Lattice Semiconductor
Timing for JTAG Operations
Figure 2. Erase (User Erase or Erase All) Timing Diagram
Figure 3. Programming Timing Diagram
t
t
t
t
t
t
t
t
t
t
f
t
t
t
ISPEN
ISPDIS
HVDIS
HVDIS
CEN
CDIS
SU1
H
CKH
CKL
MAX
CO
PWV
PWP
Symbol
TMS
TCK
State
State
TCK
TMS
VIH
VIH
VIL
VIL
Program enable delay time
Program disable delay time
High voltage discharge time, program
High voltage discharge time, erase
Falling edge of TCK to TDO active
Falling edge of TCK to TDO disable
Setup time
Hold time
TCK clock pulse width, high
TCK clock pulse width, low
Maximum TCK clock frequency
Falling edge of TCK to valid output
Verify pulse width
Programming pulse width
VIH
VIH
VIL
VIL
Update-IR
Update-IR
t
SU1
t
SU1
t
CKH
t
H
Parameter
t
CKH
t
SU1
t
t
GKL
H
Run-Test/Idle (Erase)
t
SU1
t
CKL
Run-Test/Idle (Program)
t
H
t
H
t
SU1
t
PWP
Select-DR Scan
t
CKH
t
t
SU1
H
Conditions
11
t
Select-DR Scan
CKH
t
H
t
SU1
ispPAC-POWR1014/A Data Sheet
Min.
200
10
30
30
10
20
20
30
20
—
—
—
—
5
t
CKH
t
H
t
Run-Test/Idle (Discharge)
SU1
t
SU1
t
GKL
Typ.
t
Specified by the Data Sheet
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CKH
t
t
H
CKH
Update-IR
t
H
t
SU2
t
SU1
t
CKL
t
SU1
Max.
10
10
25
10
—
—
—
—
—
—
—
—
—
—
t
CKH
t
t
CKH
H
t
H
Units
MHz
ms
µs
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns
µs