FM20L08_07 RAMTRON [Ramtron International Corporation], FM20L08_07 Datasheet
FM20L08_07
Related parts for FM20L08_07
FM20L08_07 Summary of contents
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Preliminary FM20L08 1Mbit Bytewide FRAM Memory – Industrial Temp. Features 1Mbit Ferroelectric Nonvolatile RAM Organized as 128Kx8 Unlimited Read/Write Cycles NoDelay™ Writes Page Mode Operation to 33MHz Advanced High-Reliability Ferroelectric Process SRAM Replacement JEDEC 128Kx8 SRAM pinout 60 ns Access ...
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A(16: Control Logic OE VDD VDD Monitor LVL Pin Description Pin Name Type Pin Description A(16:0) Input Address inputs: The 17 address lines select one of 131,072 bytes in the FRAM array. The address value is latched on ...
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Functional Truth Table /CE /WE A(16: Change L H Change Change X Notes: 1) H=Logic High, L=Logic Low, V=Valid Address, X=Don’t Care. 2) /WE-controlled write cycle begins as a Read ...
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Overview The FM20L08 is a bytewide FRAM memory logically organized as 131,072 x 8 and is accessed using an industry standard parallel interface. All data written to the part is immediately nonvolatile with no delay. The device offers page mode ...
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Supply Voltage Monitor An internal voltage monitor circuit continuously checks the V supply voltage. When V DD the specified threshold V , the monitor asserts the TP /LVL signal to an active-low state. The FM20L08 locks out access to the ...
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Normal Memory Operation n Read 05555h Read 1AAAAh Read 03333h Read 1CCCCh Read 100FFh Read 0FF00? y Sequence Detector For example, the following sequence write-protects addresses from 00000h to 07FFFh ...
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Software Write Protect Timing (-TG1 only) CE A(16:0) 05555 1AAAA WE OE DQ(7:0) SRAM Drop-In Replacement The FM20L08 has been designed drop-in replacement for standard asynchronous SRAMs. The device does not require /CE to toggle for each ...
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Electrical Specifications Absolute Maximum Ratings Symbol Description V Power Supply Voltage with respect Voltage on any signal pin with respect Storage Temperature STG T Lead Temperature (Soldering, 10 seconds) LEAD V Electrostatic ...
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Read Cycle AC Parameters (T = -40 A Symbol Parameter t Read Cycle Time RC t Chip Enable Access Time CE t Address Access Time AA t Output Hold Time OH t Page Mode Address Access Time AAP t Page ...
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Data Retention +10%, - 3.3V DD Parameter Data Retention Capacitance ( f=1 MHz Symbol Parameter C Input/Output Capacitance (DQ) I/O C Input Capacitance IN Notes 1. This parameter is characterized and not ...
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Page Mode Read Cycle Timing Although sequential column addressing is shown not required. Write Cycle Timing 1 (/WE-Controlled, /OE low) Write Cycle Timing 2 (/CE-Controlled) NOTE: See Write Operation section for detailed description (page 4). Rev. 1.72 May ...
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Write Cycle Timing 3 (/CE low) Page Mode Write Cycle Timing A(16:3) A(2:0) Col DQ(7:0) Although sequential column addressing is shown not required. Power Cycle Timing Rev. 1.72 May 2007 t CA ...
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Mechanical Drawing 32-pin Shrunk TSOP-I (8.0 x 13.4 mm) All dimensions in millimeters TSOP Package Marking Scheme Legend: XXXXXX= part number, SP= speed/package/temp/write-protect R=rev code, YY=year, WW=work week, LLLLLL= lot code RAMTRON XXXXXXX-SP RYYWWLLLLLL Examples: “Green” TSOP package, Industrial temp, ...
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Revision History Revision Date Summary 0.6 1/30/04 Added Vdd fall time spec. Changed Power Cycle Timing diagram. Added t Write Timing spec. Added typ value to V software write-protect scheme. Changed /LVL to Output-only pin. Modified Block Diagram, Pin Description ...