M27V101-90N6TR STMicroelectronics, M27V101-90N6TR Datasheet - Page 2

• Manufacturer Part Number: M27V101-90N6TR
• Description: 1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM
• Manufacturer: STMicroelectronics

M27V102
Figure 2A. DIP Pin Connections
Warning: NC = Not Connected.
Figure 2C. TSOP Pin Connections
Warning: NC = Not Connected.
2/15
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
V CC
DQ9
DQ8
V PP
A10
A11
A12
A13
A14
A15
NC
A9
P
E
V PP
V SS
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
G
E
1
10
11
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
M27V102
M27V102
(Normal)
AI01913
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
AI01915
40
31
30
21
V CC
P
NC
A15
A14
A13
A12
A11
A10
A9
V SS
A8
A7
A6
A5
A4
A3
A2
A1
A0
V SS
A8
A7
A6
A5
A4
A3
A2
A1
A0
G
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
V SS
For application where the content is programmed
only one time and erasure is not required, the
M27V102 is offered in PDIP40, PLCC32 and
TSOP40 (10 x 14 mm) packages.
DEVICE OPERATION
The operating modes of the M27V102 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for Vpp and 12V on A9 for Electronic
Signature.
Read Mode
The M27V102 has two control functions, both of
which must be logically active in order to obtaindata
at the outputs. Chip Enable (E) is the power control
and should be used for device selection. Output
Enable (G) is the output control and should be used
to gate data to the output pins, independent of
device selection. Assuming that the addresses are
stable, the address access time (t
the delay from E to output (t
at the output after a delay of t
edge of G, assuming that E has been low and the
addresses have been stable for at least t
t
Figure 2B. LCC Pin Connections
Warning: NC = Not Connected.
DESCRIPTION (cont’d)
GLQV
V SS
Q12
Q11
Q10
NC
Q9
Q8
Q7
Q6
Q5
Q4
.
12
M27V102
23
1
44
ELQV
). Data is available
OE
AVQV
from the falling
) is equal to
34
AI01914
A13
A12
A11
A10
A9
V SS
NC
A8
A7
A6
A5
AVQV
-