M27V101-90N6TR STMicroelectronics, M27V101-90N6TR Datasheet - Page 8

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M27V101-90N6TR

Manufacturer Part Number
M27V101-90N6TR
Description
1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM
Manufacturer
STMicroelectronics
Datasheet
M27V102
Figure 6. Programming and Verify Modes AC Waveforms
Figure 7. Programming Flowchart
8/15
YES
NO
FAIL
= 25
++n
V CC
A0-A15
Q0-Q15
V PP
E
P
G
V CC = 6.25V, V PP = 12.75V
CHECK ALL WORDS
NO
2nd: V CC = 4.2V
P = 100 s Pulse
1st: V CC = 6V
VERIFY
n = 0
Addr
Last
YES
YES
NO
tVCHPL
tVPHPL
tQVPL
tAVPL
tELPL
tPLPH
++ Addr
DATA IN
AI00707C
PROGRAM
VALID
tPHQX
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows pro-
gramming of the whole array with a guaranteed
margin, in a typical time of 6.5 seconds. Program-
ming with PRESTO II consists of applying a se-
quenceof 100 s program pulses toeach word until
a correct verify occurs (see Figure 7). During pro-
gramming and verify operation, a MARGIN MODE
circuit is automaticallyactivated in order to guaran-
tee that each cell is programmed with enough
margin. No overprogrampulse is applied since the
verify in MARGIN MODE at V
3.6V provides necessary margin to each pro-
grammed cell.
Program Inhibit
Programming of multiple M27V102s in parallel with
different data is also easily accomplished. Except
for E, all like inputs including G of the parallel
M27V102 may be common. A TTL low level pulse
applied to a M27V102’sP input, with E low and V
at 12.75V, will program that M27V102. A high level
E input inhibits the other M27V102s from being
programmed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correctly
programmed. The verify is accomplished with E
tQXGL
VERIFY
tGLQV
DATA OUT
tGHQZ
tGHAX
CC
much higher than
AI00706
PP

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